TPD12S015
- HDMI 1.3 and HDMI 1.4 Data Rate
- HDMI High-Speed Differential Signals –3-dB Bandwidth Exceeds 6.4 Gbps
- Excellent Matching Capacitance (0.05 pF) in Each Differential Signal Pair
- Internal Boost Converter to Generate 5 V From a 2.3-V to 5.5-V Battery Voltage
- HDMI Minimum Current Limit and Short-Circuit Protection at 5VOUT Pin
- Flexible Power-Saving Modes Through Separate Control Pins
- Auto-Direction Sensing Level Shifting in the CEC, SDA, and SCL Lines Drive up to 750-pF Load
- Seamless Type C and Type D Connector Routing With Flow-Through Pin Mapping
- IEC 61000-4-2 (Level 4) System Level ESD Compliance
- Integrated IOFF and Backdrive Current Protection
- Space-Saving 1.6-mm × 2.8-mm DSBGA (YFF) Package
The TPD12S015 device is an integrated HDMI ESD solution. The device pin mapping matches the HDMI Type C and Type D connector with four differential pairs. This device offers eight low-capacitance ESD clamps, allowing HDMI 1.3 or 1.4 data rates. The integrated ESD clamps and resistors provide good matching between each differential signal pair, which allows an advantage over discrete ESD clamp solutions where variations between ESD clamps degrade the differential signal quality.
The TPD12S015 provides a regulated 5-V output (5VOUT) for sourcing the HDMI power line. The regulated 5-V output supplies up to 55 mA to the HDMI receiver. The control of 5VOUT and the hot plug detect (HPD) circuitry is independent of the LS_OE control signal and is controlled by the CT_CP_HPD pin. This independent control enables the detection scheme (5VOUT + HPD) to be active before enabling the HDMI link.
There are three noninverting, bidirectional translation circuits for the SDA, SCL, and CEC lines. Each have a common power rail (VCCA) on the A side from 1.1 V to 3.6 V . On the B side, the SCL_B and SDA_B each have an internal 1.75-kΩ pullup connected to the regulated 5-V rail (5VOUT). The SCL and SDA pins meet the I2C specification and drive up to 750-pF loads. The CEC_B pin has an internal 27-kΩ pullup to an internal 3.3-V supply.
The HPD_B port has a glitch filter to avoid false detection due to the bouncing while inserting the HDMI plug.
The TPD12S015 provides IEC61000-4-2 (Level 4) ESD protection. This device is offered in a space-saving 1.6-mm × 2.8-mm wafer-level chip scale package [DSBGA (YFF)] with a 0.4-mm pitch.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPD12S015 HDMI Companion Chip With Step-Up DC-DC, I2C Level Shifter, and High-Speed ESD Clamps for Portable Applications datasheet (Rev. F) | PDF | HTML | 2016年 2月 20日 |
| User guide | Reading and Understanding an ESD Protection Data Sheet (Rev. A) | PDF | HTML | 2023年 9月 19日 | |
| Application note | ESD Protection Layout Guide (Rev. A) | PDF | HTML | 2022年 4月 7日 | |
| White paper | Designing USB for short-to-battery tolerance in automotive environments | 2016年 2月 10日 | ||
| Analog Design Journal | Design Considerations for System-Level ESD Circuit Protection | 2012年 9月 25日 | ||
| Application note | TPD12S015 PCB Layout Guidelines | 2010年 9月 30日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| DSBGA (YFF) | 28 | Ultra Librarian |
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