TPS3307-EP
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of -55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product Change Notification
- Qualification Pedigree
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Triple Supervisory Circuits for DSP and Processor-Based Systems
- Power-On Reset Generator With Fixed Delay Time of 200 ms, No External Capacitor Needed
- Temperature-Compensated Voltage Reference
- Maximum Supply Current of 40 µA
- Supply Voltage Range . . . 2 V to 6 V
- Defined RESET\ Output from VDD ≥ 1.1 V
- SO-8 and MSOP-8 Packages
- APPLICATIONS
- Military applications using DSPs, Microcontrollers or Microprocessors
- Industrial Equipment
- Programmable Controls
- Military Systems
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
The TPS3307-xx family is a series of micropower supply voltage supervisors designed for circuit initialization primarily in DSP and processor-based systems which require more than one supply voltage.
The TPS3307-18 and TPS3307-33 are designed for monitoring three independent supply voltages: 3.3 V/1.8 V/adj and 5V/3.3V/adj, respectively. The adjustable SENSE input allows the monitoring of any supply voltage >1.25 V.
During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supply voltage supervisor monitors the SENSEn inputs and keeps RESET\ active as long as SENSEn remain below the threshold voltage VIT+.An internal timer delays the return of the RESET\ output to the inactive state (high) to ensure proper system reset. The delay time, tdtyp = 200 ms, starts after all SENSEn inputs have risen above the threshold voltage VIT+. When the voltage at any SENSE input drops below the threshold voltage VIT, the RESET\output becomes active (low) again.
The TPS3307-xx family of devices incorporates a manual reset input, MR\. A low level at MR\ causes RESET\ to become active. In addition to the active-low RESET\ output, the TPS3307-xx family includes an active-high RESET output.
The devices are available in either 8-pin MSOP or a standard 8-pin SO packages and are characterized for operation over a temperature range of -55°C to 125°C.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | Triple Processor Supervisors datasheet (Rev. A) | 2005年 8月 17日 | |
E-book | Voltage Supervisor and Reset ICs: Tips, Tricks and Basics | 2019年 6月 28日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
HVSSOP (DGN) | 8 | Ultra Librarian |
SOIC (D) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點