TPS54228
- D-CAP2™ Mode Enables Fast Transient Response
- Low Output Ripple and Allows Ceramic Output Capacitor
- Wide VIN Input Voltage Range: 4.5 V to 18 V
- Output Voltage Range: 0.76 V to 7 V
- Highly Efficient Integrated FETs Optimized
for Lower Duty Cycle Applications
– 155 mΩ (High-Side) and 108 mΩ (Low-Side) - High Efficiency, Less than 10 µA at Shutdown
- High Initial Bandgap Reference Accuracy
- Adjustable Soft Start
- Prebiased Soft Start
- 700-kHz Switching Frequency (fSW)
- Cycle-by-Cycle Overcurrent Limit
- Auto-Skip Eco-Mode™ for High Efficiency at Light Load
The TPS54228 device is an adaptive on-time D-CAP2™ mode synchronous buck converter. The TPS54228 enables system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54228 uses the D-CAP2™ mode control that provides a fast transient response with no external compensation components. The adaptive on-time control supports seamless transition between PWM mode at higher load conditions and Eco-Mode™ operation at light loads. Eco-Mode™ allows the TPS54228 to maintain high efficiency during lighter load conditions. The TPS54228 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54228 is available in 8-pin SO , 8-pin SOIC, and 10-pin VSON packages, and is designed to operate over the ambient temperature range of –40°C to 85°C.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TPS54228 4.5-V to 18-V Input, 2-A Synchronous Step-Down Converter With Eco-Mode™ datasheet (Rev. E) | PDF | HTML | 2016年 8月 31日 |
User guide | TPS54228 Step-Down Converter Evaluation Module User's Guide (Rev. A) | PDF | HTML | 2021年 10月 27日 | |
Technical article | Tips for making your embedded system’s power rail design smaller | PDF | HTML | 2019年 9月 23日 | |
Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
Application note | D-CAP2 Frequency Response Model, based on frequency domain analysis of Fixed On- | 2013年 1月 2日 |
設計與開發
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TPS54228EVM-686 — 具有輕載效率且適用於 TPS54228 同步降壓轉換器的評估模組
TPS54228 Unencrypted PSpice Transient Model Package (Rev. A)
PMP4472 — AC 輸入、5V/3.3V2A 串級式電源參考設計
output of 3.3V at 2A. It implements a high efficiency controller UCC28740 to provide 5V bus voltage and a step-Down Converter TPS54228.The design achieves good line and load regulation as well as (...)
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
HSOIC (DDA) | 8 | Ultra Librarian |
SOIC (D) | 8 | Ultra Librarian |
VSON (DRC) | 10 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點