TPS54329E
- D-CAP2™ Mode Enables Fast Transient Response
- Low Output Ripple and Allows Ceramic Output Capacitor
- Wide VIN Input Voltage Range: 4.5 V to 18 V
- Output Voltage Range: 0.76 V to 7.0 V
- Highly Efficient Integrated FETs Optimized
for Lower Duty Cycle Applications
– 100 mΩ (High Side) and 74 mΩ (Low Side) - High Efficiency, less than 10 µA at shutdown
- High Initial Bandgap Reference Accuracy
- Adjustable Soft Start
- Pre-Biased Soft Start
- 650-kHz Switching Frequency (fSW)
- Cycle By Cycle Over Current Limit
- Auto-Skip Eco-mode™ for High Efficiency at Light Load
The TPS54329E is an adaptive on-time D-CAP2 mode synchronous buck converter. The TPS54329E enables system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54329E uses the D-CAP2 mode control that provides a fast transient response with no external compensation components. The adaptive on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode™ operation at light loads. Eco-mode™ allows the TPS54329E to maintain high efficiency during lighter load conditions. The TPS54329E also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54329E is available in the 8-pin DDA package, and designed to operate from –40°C to 85°C.
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Special Note
Go to TI’s extensive portfolio of DC/DC point-of-load solutions.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | 4.5V to 18V Input, 3A Synchronous Step-Down Converter with Eco-mode datasheet (Rev. A) | 2012年 3月 23日 | |
User guide | TPS54329E Step-Down Converter Evaluation Module User's Guide (Rev. A) | PDF | HTML | 2021年 10月 8日 | |
Application note | D-CAP2 Frequency Response Model, based on frequency domain analysis of Fixed On- | 2013年 1月 2日 |
設計與開發
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TPS54329E Unencrypted PSpice Transient Model Package (Rev. A)
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
HSOIC (DDA) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點