現在提供此產品的更新版本
功能相同,但引腳輸出與所比較的裝置不同
TPS62402-Q1
- Qualified for automotive applications
- AEC-Q100 qualified with the following results:
- Device temperature grade 1: –40°C to 125°C operating junction temperature range
- Device HBM ESD classification level H2
- Device CDM ESD classification level C4B
- High efficiency—up to 95%
- VIN Range from 2.5 V to 6 V
- 2.25-MHz Fixed-frequency operation
- Output current 400 mA and 600 mA
- Adjustable output voltage from 0.6 V to VIN
- Pin selectable output voltage supports simple dynamic voltage scaling
- EasyScale™ optional one-pin serial interface
- Power-save mode at light load currents
- 180° Out-of-phase operation
- Output-voltage accuracy in PWM mode ±1%
- Typical 32-µA quiescent current for both converters
- 100% Duty cycle for lowest dropout
The TPS6240x-Q1 family of devices are synchronous dual step-down DC-DC converters optimized for battery-powered portable applications and automotive systems. They provide two independent output voltage rails powered by rechargeable batteries or standard 3.3-V or 5-V voltage rail.
The EasyScale™ serial interface allows output-voltages modification during operation. The fixed-output-voltage versions, TPS62402-Q1,
TPS62404-Q1, and TPS62405-Q1 support one-pin-controlled simple dynamic voltage scaling for low-power processors.
The TPS6240x-Q1 operates at 2.25-MHz fixed switching frequency and enters the power-save mode operation at light load currents to maintain high efficiency over the entire load-current range. For low-noise applications, one can force the devices into fixed-frequency PWM mode by pulling the MODE/DATA pin high. The shutdown mode reduces the current consumption to 1.2-µA, typical. The devices allow the use of small inductors and capacitors to achieve a small solution size.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TPS6240x-Q1 2.25-MHz 400-mA and 600-mA Dual Step-Down Converter datasheet (Rev. F) | PDF | HTML | 2020年 4月 16日 |
Functional safety information | TPS6240x-Q1 Pin FMA | PDF | HTML | 2021年 10月 13日 | |
Analog Design Journal | Methods of output-voltage adjustment for DC/DC converters | 2019年 6月 14日 | ||
Application note | Performing Accurate PFM Mode Efficiency Measurements (Rev. A) | 2018年 12月 11日 | ||
Analog Design Journal | Understanding 100% mode in low-power DC/DC converters | 2018年 6月 22日 | ||
Analog Design Journal | Achieving a clean startup by using a DC/DC converter with a precise enable-pin threshold | 2017年 10月 24日 | ||
Analog Design Journal | Testing tips for applying external power to supply outputs without an input voltage | 2016年 10月 24日 | ||
Application note | Basic Calculation of a Buck Converter's Power Stage (Rev. B) | 2015年 8月 17日 | ||
Analog Design Journal | Five steps to a great PCB layout for a step-down converter | 2015年 1月 29日 |
設計與開發
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TPS62402 Unencrypted PSpice Transient Model Package (Rev. A)
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
VSON (DRC) | 10 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點