TPS62671
- 92% Efficiency at 6MHz Operation
- 17µA Quiescent Current
- Wide VIN Range From 2.3V to 4.8V
- 6MHz Regulated Frequency Operation
- Spread Spectrum, PWM Frequency Dithering
- Best in Class Load and Line Transient
- ±2% Total DC Voltage Accuracy
- Low Ripple Light-Load PFM Mode
- ≥35dB VIN PSRR (1kHz to 10kHz)
- Simple Logic Enable Inputs
- Supports External Clock Presence Detect Enable Input
- Three Surface-Mount External Components Required (One 0603 MLCC Inductor, Two 0402 Ceramic Capacitors)
- Complete Sub 0.33-mm Component Profile Solution
- Total Solution Size <10 mm2
- Available in a 6-Pin NanoFree™ (CSP) Ultra-Thin Packaging, 0.4 mm Max. Height
The TPS6267x devices are high-frequency synchronous step-down dc-dc converters optimized for small battery-powered applications. Intended for low-power applications, the TPS6267x supports up to 650-mA load current and allows the use of low cost chip inductor and capacitors.
With a wide input voltage range of 2.3V to 4.8V, the device supports applications powered by Li-Ion batteries with extended voltage range. Different fixed voltage output versions are available from 1.05V to 2.1V. The TPS6267x operates at a regulated 6-MHz switching frequency and enters the power-save mode operation at light load currents to maintain high efficiency over the entire load current range.
The PFM mode extends the battery life by reducing the quiescent current to 17µA (typ) during light load operation. For noise-sensitive applications, the device has PWM spread spectrum capability providing a lower noise regulated output, as well as low noise at the input. These features, combined with high PSRR and AC load regulation performance, make this device suitable to replace a linear regulator to obtain better power conversion efficiency.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS6267x 500-mA/650-mA, 6-MHz High-Efficiency Step-Down Converter in Low Profile Chip Scale Packaging (Height < 0.4mm) datasheet (Rev. G) | PDF | HTML | 2017年 1月 17日 |
| Application note | Performing Accurate PFM Mode Efficiency Measurements (Rev. A) | 2018年 12月 11日 | ||
| Analog Design Journal | Understanding 100% mode in low-power DC/DC converters | 2018年 6月 22日 | ||
| Analog Design Journal | Achieving a clean startup by using a DC/DC converter with a precise enable-pin threshold | 2017年 10月 24日 | ||
| Analog Design Journal | Testing tips for applying external power to supply outputs without an input voltage | 2016年 10月 24日 | ||
| Application note | Basic Calculation of a Buck Converter's Power Stage (Rev. B) | 2015年 8月 17日 | ||
| Analog Design Journal | Five steps to a great PCB layout for a step-down converter | 2015年 1月 29日 | ||
| Application note | Understanding the Absolute Maximum Ratings of the SW Node (Rev. A) | 2012年 1月 13日 | ||
| Analog Design Journal | IQ: What it is, what it isn’t, and how to use it | 2011年 6月 17日 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| DSBGA (YFD) | 6 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點