TPS650864
- Wide VIN Range from 5.6 V to 21 V
- Three Variable-Output Voltage Synchronous Step-Down Controllers with D-CAP2™ Topology
- Scalable Output Current Using External FETs With Selectable Current Limit
- I2C DVS Control From 0.41 V to 1.67 V in 10-mV Steps or 1 V to 3.575 V in 25-mV Steps
- Three Variable-Output Voltage Synchronous Step-Down Converters With DCS-Control Topology
- VIN Range From 3 V to 5.5 V
- Up to 3 A of Output Current
- I2C DVS Control From 0.41 V to 1.67 V in 10-mV Steps or 0.425 V to 3.575 V in 25-mV Steps
- Three LDO Regulators With Adjustable Output Voltage
- LDOA1: I2C-Selectable Voltage From 1.35 V to 3.3 V for up to 200 mA of Output Current
- LDOA2 and LDOA3: I2C-Selectable Voltage From 0.7 V to 1.5 V for up to 600 mA of Output Current Each
- VTT LDO for DDR Memory Termination
- Three Load Switches With Slew Rate Control
- Up to 300 mA of Output Current With Voltage Drop Less Than 1.5% of Nominal Input Voltage
- RDSON < 96 mΩ at Input Voltage of 1.8 V
- 5-V Fixed-Output Voltage LDO (LDO5)
- Power Supply for Gate Drivers of SMPS and for LDOA1
- Automatic Switch to External 5-V Buck for Higher Efficiency
- Built-in Flexibility and Configurability by Factory OTP Programming
- Six GPI Pins Configurable to Enable (CTL1 to CTL6) or Sleep Mode Entry (CTL3 and CTL6) of Any Selected Rails
- Four GPO Pins Configurable to Power Good of Any Selected Rails
- Open-Drain Interrupt Output Pin
- I2C Interface Supports Standard Mode (100 kHz), Fast Mode (400 kHz), and Fast Mode Plus (1 MHz)
The TPS650864 device family is a single-chip power-management IC (PMIC) designed for Xilinx Zynq multiprocessor system-on-chip (MPSoCs) and field programmable gate array (FPGA) families. The TPS650864 offers an input range of 5.6 V to 21 V, enabling a wide range of applications (see the Device Comparison Table). The device is targeted for wall-powered applications or 2S, 3S, or 4S Li-Ion battery packs (NVDC or non-NVDC power architectures). See the Typical Application section for 5-V input supplies. The D-CAP2 and DCS-Control high-frequency voltage regulators use small passives to achieve a small solution size. The D-CAP2 and DCS-Control topologies have excellent transient response performance, ideal for processor core and system memory rails that have fast load switching. An I2C interface allows simple control either by an embedded controller (EC) or by an SoC. The PMIC comes in an 8-mm × 8-mm, single-row VQFN package with thermal pad for good thermal dissipation.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS650864 Configurable Multirail PMU for Xilinx MPSoCs and FPGAs datasheet (Rev. E) | PDF | HTML | 2021年 5月 6日 |
| Application note | Using TPS65086x PMIC to Power Xilinx Zynq UltraScale+ MPSoCs | PDF | HTML | 2021年 10月 28日 | |
| Application note | Push-Button Circuit (Rev. B) | 2017年 11月 1日 | ||
| Application note | TPS65086x Schematic and Layout Checklist (Rev. A) | 2015年 12月 2日 | ||
| White paper | Power management integrated buck controllers for distant point-of-load apps | 2015年 8月 14日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
TPS650860EVM-116 — TPS650860 評估模組
Evaluation Module (EVM) for the TPS65086x family. The EVM provides a platform for engineers to evaluate, test, and explore the TPS650860 in a real world application use. All of the sequencing and functionality required for the processor and system is demonstrated on this board. This EVM also (...)
TIDA-01393 — 適合 Xilinx® Zynq® UltraScale+™ MPSoC 應用的電源參考設計
The various versions of the TPS65086x PMIC allow this design to power devices from the basic ZU2CG device with a dual-core Arm® (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RSK) | 64 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。