TPS65185
- Single Chip Power-Management Solution for
E Ink® Vizplex™ Electronic Paper (E-Paper) Displays - Generates Positive and Negative Gates, and Source Driver Voltages and Back-Plane Bias From a Single, Low-Voltage Input Supply
- Supports 9.7-Inch and Larger Panel Sizes
- 3-V to 6-V Input Voltage Range
- Boost Converter for Positive Rail Base
- Inverting Buck-Boost Converter for Negative Rail Base
- Two Adjustable LDOs for Source Driver Supply
- TPS65185 LDO1: 15 V, 120 mA (VPOS)
- TPS65185 LDO2: –15 V, 120 mA (VNEG)
- TPS651851 LDO1: 15 V, 200 mA at
VIN ≥ 3.6 V (VPOS) - TPS651851 LDO2: –15 V, 200 mA at
VIN ≥ 3.6 V (VNEG)
- Accurate Output Voltage Tracking
- VPOS – VNEG = ±50 mV
- Two Charge Pumps for Gate Driver Supply
- CP1: 22 V, 15 mA (VDDH)
- CP2: –20 V, 15 mA, (VEE)
- Adjustable VCOM Driver for Accurate Panel-Backplane Biasing
- 0 V to –5.11 V
- ± 1.5% accuracy (±10 mV)
- 9-Bit Control (10-mV Nominal Step Size)
- Active Discharge on All Rails
- Integrated 10-Ω, 3.3-V Power Switch for Disabling System Power Rail to E-Ink Panel
The TPS65185x device is a single-chip power supply designed to for E Ink Vizplex displays used in portable e-reader applications, and the device supports panel sizes up to 9.7 inches and greater. Two high efficiency DC-DC boost converters generate ±16-V rails that are boosted to 22 V and –20 V by two change pumps to provide the gate driver supply for the Vizplex panel. Two tracking LDOs create the ±15-V source driver supplies that support up to 120/200 mA (TPS65185/TPS651851) of output current. All rails are adjustable through the I2C interface to accommodate specific panel requirements.
Accurate back-plane biasing is provided by a linear amplifier that can be adjusted from 0 V to –5.11 V with 9-bit control through the serial interface; it can source or sink current depending on panel condition. The TPS65185x supports automatic panel kickback voltage measurement, which eliminates the need for manual VCOM calibration in the production line. The measurement result can be stored in non-volatile memory to become the new VCOM power-up default value.
TPS65185 is available in two packages, a 48-pin 7-mm × 7-mm2 VQFN (RGZ) with 0.5-mm pitch, and a 48-pin 6-mm × 6-mm2 VQFN (RSL) with 0.4-mm pitch. The TPS651851 is available in a 48-pin 6-mm × 6-mm2 VQFN (RSL) with 0.4-mm pitch.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS65185x PMIC for E Ink® Vizplex™ Enabled Electronic Paper Display datasheet (Rev. G) | PDF | HTML | 2017年 9月 21日 |
| Application note | Understanding Undervoltage Lockout in Power Devices (Rev. A) | 2018年 9月 19日 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
| EVM User's guide | TPS65185 Evaluation Module (Rev. A) | 2017年 11月 16日 | ||
| Technical article | Use PMICs to extend battery life in portable applications | PDF | HTML | 2016年 9月 8日 |
設計與開發
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TPS65185EVM — TPS65185EVM
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGZ) | 48 | Ultra Librarian |
| VQFN (RSL) | 48 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。