TPS65193
- Dual High-Voltage Scan Driver
- Scan Driver Output Charge Share
- High Output-Voltage Level: Up to 35 V
- Low Output-Voltage Level: Down to –28 V
- Logic-Level Inputs
- 24-Pin 4-mm × 4-mm QFN package
- APPLICATIONS
- TFT LCD Using Amorphous Silicon Gate (ASG) Technology
The TPS65193 is dual high-voltage scan driver to drive an amorphous-silicon-gate (ASG) circuit on TFT glass. Each single high-voltage scan driver receives logic-level inputs of CPVx and generates two high-voltage outputs of CKVx and CKVBx. The device receives a logic-level input of STV and generates a high-voltage output of STVP. These outputs are swings from Voff (–28 V) to Von (35 V) and are used to drive the ASG circuit and charge/discharge the capacitive loads of the TFT LCD. In order to reduce the power dissipation of the device, a charge-share function is implemented. The device features a discharge function, which shorts Voff to GND in order to shut down the panel faster when the LCD is turned off.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS65193 Dual High-Voltage Scan Driver for TFT-LCD datasheet (Rev. A) | 2010年 7月 14日 | |
| Application note | Understanding Undervoltage Lockout in Power Devices (Rev. A) | 2018年 9月 19日 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 |
設計與開發
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TPS65193 Unencrypted PSpice Transient Model Package (Rev. A)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGE) | 24 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點