TPS6594-Q1

現行

具五個降壓穩壓器和四個低壓降穩壓器的車用 2.8-V 至 5.5-V PMIC

產品詳細資料

Regulated outputs (#) 9 Configurability Factory programmable, Software configurable Vin (min) (V) 2.8 Vin (max) (V) 5.5 Vout (min) (V) 0.3 Vout (max) (V) 3.3 Iout (max) (A) 14 Features Adaptive/dynamic voltage scaling, Comm control, Dynamic voltage scaling, I2C control, Multiple outputs, Output discharge, Overcurrent protection, Power good, Power sequencing, SPI control, Soft-start adjustable TI functional safety category Functional Safety-Compliant Step-up DC/DC converter 0 Step-down DC/DC converter 5 Step-down DC/DC controller 0 Step-up DC/DC controller 0 LDO 4 Iq (typ) (mA) 0.002 Rating Automotive Switching frequency (max) (kHz) 2400 Operating temperature range (°C) -40 to 125 Processor supplier Texas Instruments Processor name Jacinto DRA8x, Jacinto TDA4x Shutdown current (ISD) (typ) (µA) 2 Switching frequency (typ) (kHz) 2200 Product type Processor and FPGA
Regulated outputs (#) 9 Configurability Factory programmable, Software configurable Vin (min) (V) 2.8 Vin (max) (V) 5.5 Vout (min) (V) 0.3 Vout (max) (V) 3.3 Iout (max) (A) 14 Features Adaptive/dynamic voltage scaling, Comm control, Dynamic voltage scaling, I2C control, Multiple outputs, Output discharge, Overcurrent protection, Power good, Power sequencing, SPI control, Soft-start adjustable TI functional safety category Functional Safety-Compliant Step-up DC/DC converter 0 Step-down DC/DC converter 5 Step-down DC/DC controller 0 Step-up DC/DC controller 0 LDO 4 Iq (typ) (mA) 0.002 Rating Automotive Switching frequency (max) (kHz) 2400 Operating temperature range (°C) -40 to 125 Processor supplier Texas Instruments Processor name Jacinto DRA8x, Jacinto TDA4x Shutdown current (ISD) (typ) (µA) 2 Switching frequency (typ) (kHz) 2200 Product type Processor and FPGA
VQFNP (RWE) 56 64 mm² 8 x 8
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device operates from 3 V to 5.5 V input supply
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM classification level 2
    • Device CDM classification level C4A
  • Functional Safety-Compliant
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 system design up to ASIL-D
    • Documentation available to aid IEC 61508 system design up to SIL-3
    • Systematic capability up to ASIL-D
    • Hardware integrity up to ASIL-D
    • Input supply voltage monitor and over-voltage protection
    • Under/overvoltage monitors and over-current monitors on all output supply rails
    • Watchdog with selectable trigger / Q&A mode
    • Two error signal monitors (ESMs) with selectable level / PWM mode
    • Thermal monitoring with high temperature warning and thermal shutdown
    • Bit-integrity (CRC) error detection on internal configuration registers and non-volatile memory (NVM)
  • Low-power consumption
    • 2 µA typical shutdown current
    • 7 µA typical in back up supply only mode
    • 20 µA typical in low power standby mode
  • Five step-down switched-mode power supply (BUCK) regulators:
    • 0.3 V to 3.34 V output voltage range in 5, 10, or 20-mV steps
    • One with 4 A, three with 3.5 A, and one with 2 A output current capability
    • Flexible multi-phase capability for four BUCKs: up to 14 A output current from a single rail
    • Short-circuit and over-current protection
    • Internal soft-start for in-rush current limitation
    • 2.2 MHz / 4.4 MHz switching frequency
    • Ability to synchronize to external clock input
  • Three low-dropout (LDO) linear regulators with configurable bypass mode
    • 0.6 V to 3.3 V output voltage range with 50-mV steps in linear regulation mode
    • 1.7 V to 3.3 V output voltage range in bypass mode
    • 500 mA output current capability with short-circuit and over-current protection
  • One low-dropout (LDO) linear regulator with low-noise performance
    • 1.2 V to 3.3 V output voltage range in 25-mV steps
    • 300 mA output current capability with short-circuit and over-current protection
  • Configurable power sequence control in non-volatile memory (NVM):
    • Configurable power-up and power-down sequences between power states
    • Digital output signals can be included in the power sequences
    • Digital input signals can be used to trigger power sequence transitions
    • Configurable handling of safety-relevant errors
  • 32-kHz crystal oscillator with option to output a buffered 32-kHz clock output
  • Real-time clock (RTC) with alarm and periodic wake-up mechanism
  • One SPI or two I2C control interfaces , with second I2C interface dedicated for Q&A watchdog communication
  • Package option:
    • 8-mm × 8-mm 56-pin VQFNP with 0.5-mm pitch
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device operates from 3 V to 5.5 V input supply
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM classification level 2
    • Device CDM classification level C4A
  • Functional Safety-Compliant
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 system design up to ASIL-D
    • Documentation available to aid IEC 61508 system design up to SIL-3
    • Systematic capability up to ASIL-D
    • Hardware integrity up to ASIL-D
    • Input supply voltage monitor and over-voltage protection
    • Under/overvoltage monitors and over-current monitors on all output supply rails
    • Watchdog with selectable trigger / Q&A mode
    • Two error signal monitors (ESMs) with selectable level / PWM mode
    • Thermal monitoring with high temperature warning and thermal shutdown
    • Bit-integrity (CRC) error detection on internal configuration registers and non-volatile memory (NVM)
  • Low-power consumption
    • 2 µA typical shutdown current
    • 7 µA typical in back up supply only mode
    • 20 µA typical in low power standby mode
  • Five step-down switched-mode power supply (BUCK) regulators:
    • 0.3 V to 3.34 V output voltage range in 5, 10, or 20-mV steps
    • One with 4 A, three with 3.5 A, and one with 2 A output current capability
    • Flexible multi-phase capability for four BUCKs: up to 14 A output current from a single rail
    • Short-circuit and over-current protection
    • Internal soft-start for in-rush current limitation
    • 2.2 MHz / 4.4 MHz switching frequency
    • Ability to synchronize to external clock input
  • Three low-dropout (LDO) linear regulators with configurable bypass mode
    • 0.6 V to 3.3 V output voltage range with 50-mV steps in linear regulation mode
    • 1.7 V to 3.3 V output voltage range in bypass mode
    • 500 mA output current capability with short-circuit and over-current protection
  • One low-dropout (LDO) linear regulator with low-noise performance
    • 1.2 V to 3.3 V output voltage range in 25-mV steps
    • 300 mA output current capability with short-circuit and over-current protection
  • Configurable power sequence control in non-volatile memory (NVM):
    • Configurable power-up and power-down sequences between power states
    • Digital output signals can be included in the power sequences
    • Digital input signals can be used to trigger power sequence transitions
    • Configurable handling of safety-relevant errors
  • 32-kHz crystal oscillator with option to output a buffered 32-kHz clock output
  • Real-time clock (RTC) with alarm and periodic wake-up mechanism
  • One SPI or two I2C control interfaces , with second I2C interface dedicated for Q&A watchdog communication
  • Package option:
    • 8-mm × 8-mm 56-pin VQFNP with 0.5-mm pitch

The TPS6594-Q1 device provides four flexible multi-phase configurable BUCK regulators with 3.5 A output current per phase, and one additional BUCK regulator with 2 A output current.

All of the BUCK regulators can be synchronized to an internal 2.2-MHz or 4.4-MHz or an external 1-MHz, 2-MHz, or 4-MHz clock signal. To improve the EMC performance, an integrated spread-spectrum modulation can be added to the synchronized BUCK switching clock signal. This clock signal can also be made available to external devices through a GPIO output pin. The device provides four LDOs: three with 500-mA capability, which can be configured as load switches; one with 300-mA capability and low-noise performance.

Non-volatile memory (NVM) is used to control the default power sequences and default configurations, such as output voltage and GPIO configurations. The NVM is pre-programmed to allow start-up without external programming. Most static configurations, stored in the register map of the device, can be changed from the default through SPI or I2C interfaces to configure the device to meet many different system needs. The NVM contains a bit-integrity-error detection feature (CRC) to stop the power-up sequence if an error is detected, preventing the system from starting in an unknown state.

The TPS6594-Q1 includes a 32-kHz crystal oscillator, which generates an accurate 32-kHz clock for the integrated RTC module. A backup-battery management provides power to the crystal oscillator and the real-time clock (RTC) module from a coin cell battery or a super-cap in the event of power loss from the main supply.

The TPS6594-Q1 device includes protection and diagnostic mechanisms such as voltage monitoring on the input supply , input over-voltage protection, voltage monitoring on all BUCK and LDO regulator outputs, register and interface CRC, current-limit, short-circuit protection, thermal pre-warning, and over-temperature shutdown. The device also includes a Q&A or trigger mode watchdog to monitor for MCU software lockup, and two error signal monitor (ESM) inputs with fault injection options to monitor the error signals from the attached SoC or MCU. The TPS6594-Q1 can notify the processor of these events through the interrupt handler, allowing the MCU to take action in response.

The TPS6594-Q1 device provides four flexible multi-phase configurable BUCK regulators with 3.5 A output current per phase, and one additional BUCK regulator with 2 A output current.

All of the BUCK regulators can be synchronized to an internal 2.2-MHz or 4.4-MHz or an external 1-MHz, 2-MHz, or 4-MHz clock signal. To improve the EMC performance, an integrated spread-spectrum modulation can be added to the synchronized BUCK switching clock signal. This clock signal can also be made available to external devices through a GPIO output pin. The device provides four LDOs: three with 500-mA capability, which can be configured as load switches; one with 300-mA capability and low-noise performance.

Non-volatile memory (NVM) is used to control the default power sequences and default configurations, such as output voltage and GPIO configurations. The NVM is pre-programmed to allow start-up without external programming. Most static configurations, stored in the register map of the device, can be changed from the default through SPI or I2C interfaces to configure the device to meet many different system needs. The NVM contains a bit-integrity-error detection feature (CRC) to stop the power-up sequence if an error is detected, preventing the system from starting in an unknown state.

The TPS6594-Q1 includes a 32-kHz crystal oscillator, which generates an accurate 32-kHz clock for the integrated RTC module. A backup-battery management provides power to the crystal oscillator and the real-time clock (RTC) module from a coin cell battery or a super-cap in the event of power loss from the main supply.

The TPS6594-Q1 device includes protection and diagnostic mechanisms such as voltage monitoring on the input supply , input over-voltage protection, voltage monitoring on all BUCK and LDO regulator outputs, register and interface CRC, current-limit, short-circuit protection, thermal pre-warning, and over-temperature shutdown. The device also includes a Q&A or trigger mode watchdog to monitor for MCU software lockup, and two error signal monitor (ESM) inputs with fault injection options to monitor the error signals from the attached SoC or MCU. The TPS6594-Q1 can notify the processor of these events through the interrupt handler, allowing the MCU to take action in response.

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TPS6593-Q1 現行 具有 5 個降壓和 4 個 LDO 的車用 2.8-V 至 5.5-V PMIC Helps achieve ASIL-B functional safety.

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類型 標題 日期
* Data sheet TPS6594-Q1 Power Management IC (PMIC) for Processors with 5 Bucks and 4 LDOs datasheet (Rev. B) 2021年 12月 22日
Technical article Building multicamera vision perception systems for ADAS domain controllers with integrated processors PDF | HTML 2024年 1月 5日
Technical article Four power supply challenges in ADAS front camera designs PDF | HTML 2024年 1月 5日
Application note Scalable PMIC NVM Update Guide (Rev. A) PDF | HTML 2023年 4月 28日
User guide TPS65941319-Q1 PMIC User Guide for Sitara AM65 Processors PDF | HTML 2023年 4月 24日
User guide Powering Jacinto 7 SoC For Isolated Power Groups With TPS6594133A-Q1 + Dual HCPS PDF | HTML 2023年 3月 1日
User guide Powering DRA821 with TPS6594-Q1 and LP8764-Q1 (Rev. A) PDF | HTML 2022年 9月 12日
User guide TPS65941120-Q1, TPS65941421Q1 and LP876411B5Q1 PMIC User Guide for J7AEP PDN0A PDF | HTML 2022年 8月 18日
User guide Scalable PMIC's GUI User’s Guide (Rev. B) PDF | HTML 2022年 6月 27日
User guide TPS65941213-Q1 and LP876411B4-Q1 PMIC User Guide for J721E, PDN-1A PDF | HTML 2022年 2月 2日
User guide TPS65941212-Q1 and TPS65941111-Q1 PMIC User Guide for J721E, PDN-0B (Rev. B) PDF | HTML 2022年 1月 31日
User guide Optimized TPS65941213-Q1 and TPS65941111-Q1 PMIC User Guide for J721E, PDN-0C (Rev. A) PDF | HTML 2022年 1月 26日
Application note TPS6594-Q1 Schematic PCB Checklist (Rev. A) 2021年 12月 7日
User guide Single PMIC User's Guide for Jacinto 7 DRA821, PDN-2A PDF | HTML 2021年 11月 9日
White paper 運用 Jacinto™ 7 處理器的汽車設計功能安全特性 2020年 3月 1日
Technical article Making ADAS technology more accessible in vehicles PDF | HTML 2020年 1月 7日

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SLVMDK9A.ZIP (338 KB) - PSpice Model
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