TPS73601-EP
- Controlled Baseline
- One Assembly
- One Test Site
- One Fabrication Site
- Extended Temperature Performance of
–55°C to 125°C - Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree(1)
- Stable With No Output Capacitor or Any Value or Type of Capacitor
- Input Voltage Range of 1.7 V to 5.5 V
- Ultra-Low Dropout Voltage: 75 mV Typical
- Excellent Load Transient Response—With or Without Optional Output Capacitor
- New NMOS Topology Delivers Low Reverse Leakage Current
- Low Noise: 30 µVRMS Typical
(10 Hz to 100 kHz) - 0.5% Initial Accuracy
- 1% Overall Accuracy Over Line, Load, and Temperature
- Less Than 1-µA Max IQ in Shutdown Mode
- Thermal Shutdown and Specified Min/Max Current Limit Protection
- Available in Multiple Output Voltage Versions
- Fixed Outputs of 1.2 V to 3.3 V
- Adjustable Output from 1.2 V to 5.5 V
- Custom Outputs Available
- APPLICATIONS
- Portable/Battery-Powered Equipment
- Post-Regulation for Switching Supplies
- Noise-Sensitive Circuitry Such as VCOs
- Point of Load Regulation for DSPs, FPGAs, ASICs, and Microprocessors
(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
All other trademarks are the property of their respective owners.
The TPS736xx family of low-dropout (LDO) linear voltage regulators uses a new topologyan NMOS pass element in a voltage-follower configuration. This topology is stable using output capacitors with low ESR and allows operation without a capacitor. It also provides high reverse blockage (low reverse current) and ground-pin current that is nearly constant over all values of output current.
The TPS736xx uses an advanced BiCMOS process to yield high precision while delivering low dropout voltages and low ground-pin current. Current consumption, when not enabled, is under 1 µA and ideal for portable applications. The low output noise (30 µVRMS with 0.1-µF CNR) is ideal for powering VCOs. These devices are protected by thermal shutdown and foldback current limit.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | Cap-Free NMOS 400-mA Low-Dropout Regulators With Reverse Current Protection datasheet (Rev. C) | 2009年 2月 13日 | |
* | VID | TPS73601-EP VID V6206626 | 2016年 6月 21日 | |
* | VID | TPS73601-EP VID V6206626 | 2016年 6月 21日 | |
* | VID | TPS73601-EP VID V6206626 | 2016年 6月 21日 | |
* | VID | TPS73601-EP VID V6206626 | 2016年 6月 21日 | |
* | VID | TPS73601-EP VID V6206626 | 2016年 6月 21日 | |
* | VID | TPS73601-EP VID V6206626 | 2016年 6月 21日 | |
* | VID | TPS73601-EP VID V6206626 | 2016年 6月 21日 | |
* | Radiation & reliability report | TPS73601MDCQREP Reliability Reports | 2011年 8月 26日 | |
* | Radiation & reliability report | TPS73601MDRBREP Reliability Report | 2011年 8月 26日 | |
Application note | LDO Noise Demystified (Rev. B) | PDF | HTML | 2020年 8月 18日 | |
Application note | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 2017年 8月 9日 |
設計與開發
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOT-223 (DCQ) | 6 | Ultra Librarian |
SOT-23 (DBV) | 5 | Ultra Librarian |
VSON (DRB) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。