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線性與低壓差 (LDO) 穩壓器

TPS74401-EP

現行

強化型產品 3-A LDO、0.8-V 至 3.6-V 輸出、快速瞬態回應及可編程緩啟動

立即訂購
產品規格表

TPS74401-EP

現行
產品規格表 立即訂購

產品詳細資料

Output options Adjustable Output Iout (max) (A) 3 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.6 Vout (min) (V) 0.8 Rating HiRel Enhanced Product Noise (µVrms) 13 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 3 Thermal resistance θJA (°C/W) 27 Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 115 Operating temperature range (°C) -55 to 125
Output options Adjustable Output Iout (max) (A) 3 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.6 Vout (min) (V) 0.8 Rating HiRel Enhanced Product Noise (µVrms) 13 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 3 Thermal resistance θJA (°C/W) 27 Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 115 Operating temperature range (°C) -55 to 125
VQFN (RGW) 20 25 mm² 5 x 5
  • Soft-Start (SS) Pin Provides a Linear Startup with Ramp Time Set by External Capacitor
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9 V with External Bias Supply
  • Adjustable Output (0.8 V to 3.6 V)
  • Ultra-Low Dropout: 115 mV at 3.0 A (typ)
  • Stable with Any or No Output Capacitor
  • Excellent Transient Response
  • Available in 5 mm × 5 mm × 1 mm QFN Package
  • Active High Enable
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Ranges(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • APPLICATIONS
    • FPGA Applications
    • DSP Core and I/O Voltages
    • Post-Regulation Applications
    • Applications with Special Start-Up Time or Sequencing Requirements
    • Hot-Swap and Inrush Controls

(1) Custom temperature ranges available
All other trademarks are the property of their respective owners
  • Soft-Start (SS) Pin Provides a Linear Startup with Ramp Time Set by External Capacitor
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9 V with External Bias Supply
  • Adjustable Output (0.8 V to 3.6 V)
  • Ultra-Low Dropout: 115 mV at 3.0 A (typ)
  • Stable with Any or No Output Capacitor
  • Excellent Transient Response
  • Available in 5 mm × 5 mm × 1 mm QFN Package
  • Active High Enable
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Ranges(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • APPLICATIONS
    • FPGA Applications
    • DSP Core and I/O Voltages
    • Post-Regulation Applications
    • Applications with Special Start-Up Time or Sequencing Requirements
    • Hot-Swap and Inrush Controls

(1) Custom temperature ranges available
All other trademarks are the property of their respective owners

The TPS74401 low-dropout (LDO) linear regulator provides an easy-to-use robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that will meet the sequencing requirements of FPGAs, DSPs, and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. Each LDO is stable with low-cost ceramic output capacitors and the device is fully specified from –55°C to 125°C.

The TPS74401 low-dropout (LDO) linear regulator provides an easy-to-use robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that will meet the sequencing requirements of FPGAs, DSPs, and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. Each LDO is stable with low-cost ceramic output capacitors and the device is fully specified from –55°C to 125°C.

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類型 標題 日期
* Data sheet 3.0A Ultra-LDO With Programmable Soft-Start. datasheet (Rev. B) 2010年 9月 8日
* VID TPS74401-EP VID V6210611 2016年 6月 21日
* Radiation & reliability report TPS74401MRGWTEP Reliability Report 2011年 10月 26日

設計與開發

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參考設計

TIDA-01442 — 適用於 L、S、C 和 X 波段的直接射頻取樣雷達接收器參考設計

此參考設計利用 ADC12DJ3200 評估模組 (EVM)，展示用於以 HF、VHF、UHF、L、S、C 和 X 波段的一部分操作雷達的直接射頻取樣接收器。類比轉數位轉換器 (ADC) 的廣泛類比輸入頻寬與高取樣率 (6.4 GSPS)，採用單或雙 ADC 提供多頻段範圍。ADC 的直接射頻取樣功能，可透過省去數個向下轉換階段減少零組件數量，進而降低整體系統複雜性。
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGW) 20 Ultra Librarian
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  • 認證摘要
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