TPS75325-EP

現行

強化型產品、快速瞬態回應 1.5-A 低壓降電穩壓器

產品詳細資料

Output options Fixed Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 2.5 Vout (min) (V) 2.5 Fixed output options (V) 2.5 Rating HiRel Enhanced Product Noise (µVrms) 60 PSRR at 100 KHz (dB) 17 Iq (typ) (mA) 0.07 Thermal resistance θJA (°C/W) 57.9 Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 160 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 2.5 Vout (min) (V) 2.5 Fixed output options (V) 2.5 Rating HiRel Enhanced Product Noise (µVrms) 60 PSRR at 100 KHz (dB) 17 Iq (typ) (mA) 0.07 Thermal resistance θJA (°C/W) 57.9 Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 160 Operating temperature range (°C) -40 to 125
HTSSOP (PWP) 20 41.6 mm² 6.5 x 6.4
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • 1.5-A Low-Dropout Voltage Regulator
  • Available in 1.5-V, 1.8-V, 2.5-V, 3.3-V, Fixed Output and Adjustable Versions
  • Open Drain Power-Good (PG) Status Output (TPS751xxQ)
  • Open Drain Power-On Reset With 100-ms Delay (TPS753xxQ)
  • Dropout Voltage Typically 160 mV at 1.5 A (TPS75133Q)
  • Ultralow 75 µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions For Fixed-Output Versions
  • 20-Pin TSSOP (PWP) PowerPAD™ Package
  • Thermal Shutdown Protection

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
PowerPAD is a trademark of Texas Instruments.

  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • 1.5-A Low-Dropout Voltage Regulator
  • Available in 1.5-V, 1.8-V, 2.5-V, 3.3-V, Fixed Output and Adjustable Versions
  • Open Drain Power-Good (PG) Status Output (TPS751xxQ)
  • Open Drain Power-On Reset With 100-ms Delay (TPS753xxQ)
  • Dropout Voltage Typically 160 mV at 1.5 A (TPS75133Q)
  • Ultralow 75 µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions For Fixed-Output Versions
  • 20-Pin TSSOP (PWP) PowerPAD™ Package
  • Thermal Shutdown Protection

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
PowerPAD is a trademark of Texas Instruments.

The TPS753xxQ and TPS751xxQ are low dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS751xxQ and TPS753xxQ are designed to have fast transient response for larger load current changes.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.

The device is enabled when EN\ is connected to a low level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1µA at TJ = 25°C.

For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.

The RESET\ (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.

The TPS751xxQ or TPS753xxQ is offered in 1.5-V, 1.8-V, 2.5-V and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in 20-pin TSSOP (PWP) packages.

The TPS753xxQ and TPS751xxQ are low dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS751xxQ and TPS753xxQ are designed to have fast transient response for larger load current changes.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.

The device is enabled when EN\ is connected to a low level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1µA at TJ = 25°C.

For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.

The RESET\ (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.

The TPS751xxQ or TPS753xxQ is offered in 1.5-V, 1.8-V, 2.5-V and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in 20-pin TSSOP (PWP) packages.

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類型 標題 日期
* Data sheet TPS751xx-EP w/Power Good TPS753xx-EP w/Reset Fast-Trans-Resp 1.5-A Low-Dropout V datasheet 2003年 4月 15日
Application note LDO Noise Demystified (Rev. B) PDF | HTML 2020年 8月 18日
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017年 8月 9日

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HTSSOP (PWP) 20 Ultra Librarian

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  • 認證摘要
  • 進行中持續性的可靠性監測
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