TPS76850-EP
- 1-A Low-Dropout Voltage Regulator
- Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V,
3.0-V, 3.3-V, 5.0-V Fixed Output and Adjustable Versions - Dropout Voltage Down to 230 mV at 1 A
(TPS76850) - Ultralow 85-µA Typical Quiescent Current
- Fast Transient Response
- 2% Tolerance Over Specified Conditions for
Fixed-Output Versions - Open Drain Power Good (See TPS767xx for
Power-On Reset With 200-ms Delay Option) - 20-Pin TSSOP (PWP) PowerPAD™ Package
- Thermal Shutdown Protection
- SUPPORTS DEFENSE, AEROSPACE AND MEDICAL APPLICATION
- Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
- Available in Military (–55°C/125°C)
Temperature Range - Extended Product LIfe Cycle
- Extended Product-Change Notification
- Product Traceability
Additional temperature ranges are available - contact factory.
PowerPAD is a trademark of Texas Instruments.
This device is designed to have a fast transient response and be stable with 10-µF low ESR capacitors. This combination provides high performance at a reasonable cost.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 230 mV at an output current of 1 A for the TPS76850) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 µA over the full range of output current, 0 mA to 1 A). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ = 25°C.
Power good (PG) is an active high output, which can be used to implement a power-on reset or a low-battery indicator.
The TPS768xx is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, and 5.0-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.2 V to 5.5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS768xx family is available in a 20-pin PWP package.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TPS768xx-EP: Fast-Transient-Response 1-A Low-Dropout Voltage Regulators datasheet (Rev. B) | 2008年 12月 15日 | |
Application note | LDO Noise Demystified (Rev. B) | PDF | HTML | 2020年 8月 18日 | |
Application note | PowerPAD™ Thermally Enhanced Package (Rev. H) | 2018年 7月 6日 | ||
Application note | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 2017年 8月 9日 |
設計與開發
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
HTSSOP (PWP) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。