TPS775

現行

具啟用與延遲重設功能的 500-mA、10-V、低 IQ 低壓降電壓穩壓器

產品詳細資料

Output options Adjustable Output, Fixed Output Iout (max) (A) 0.5 Vin (max) (V) 10 Vin (min) (V) 2.7 Vout (max) (V) 5.5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.6, 1.8, 2.5, 3.3 Rating Catalog Noise (µVrms) 53 PSRR at 100 KHz (dB) 29 Iq (typ) (mA) 0.08 Thermal resistance θJA (°C/W) 37.9, 43 Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 169 Operating temperature range (°C) -40 to 125
Output options Adjustable Output, Fixed Output Iout (max) (A) 0.5 Vin (max) (V) 10 Vin (min) (V) 2.7 Vout (max) (V) 5.5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.6, 1.8, 2.5, 3.3 Rating Catalog Noise (µVrms) 53 PSRR at 100 KHz (dB) 29 Iq (typ) (mA) 0.08 Thermal resistance θJA (°C/W) 37.9, 43 Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 169 Operating temperature range (°C) -40 to 125
HTSSOP (PWP) 20 41.6 mm² 6.5 x 6.4 SOIC (D) 8 29.4 mm² 4.9 x 6
  • Open Drain Power-On Reset with 200ms Delay (TPS775xx)
  • Open Drain Power Good (TPS776xx)
  • 500mA Low-Dropout Voltage Regulator
  • Available in Fixed Output and Adjustable Versions
  • Dropout Voltage to 169mV (Typ) at 500mA (TPS77x33)
  • Ultralow 85µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 8-Pin SOIC and 20-Pin TSSOP PowerPAD™ (PWP) Packages
  • Thermal Shutdown Protection
  • APPLICATIONS
    • FPGA Power
    • DSP Core and I/O Voltages

PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

  • Open Drain Power-On Reset with 200ms Delay (TPS775xx)
  • Open Drain Power Good (TPS776xx)
  • 500mA Low-Dropout Voltage Regulator
  • Available in Fixed Output and Adjustable Versions
  • Dropout Voltage to 169mV (Typ) at 500mA (TPS77x33)
  • Ultralow 85µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 8-Pin SOIC and 20-Pin TSSOP PowerPAD™ (PWP) Packages
  • Thermal Shutdown Protection
  • APPLICATIONS
    • FPGA Power
    • DSP Core and I/O Voltages

PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

The TPS775xx and TPS776xx devices are designed to have a fast transient response and be stable with a 10µF low ESR capacitor. This combination provides high performance at a reasonable cost.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 169mV at an output current of 500mA for the TPS77x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85µA over the full range of output current, 0mA to 500mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to 1µA at TJ = +25°C.

The RESET output of the TPS775xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS775xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.

Power good (PG) of the TPS776xx is an active high output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS775xx and TPS776xx are offered in 1.5V, 1.6V (TPS77516 only), 1.8V, 2.5V, 2.8V (TPS77628 only), and 3.3V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5V to 5.5V for the TPS77501 and 1.2V to 5.5V for the TPS77601). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS775xx and TPS776xx families are available in 8-pin SOIC and 20-pin TSSOP packages.

The TPS775xx and TPS776xx devices are designed to have a fast transient response and be stable with a 10µF low ESR capacitor. This combination provides high performance at a reasonable cost.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 169mV at an output current of 500mA for the TPS77x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85µA over the full range of output current, 0mA to 500mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to 1µA at TJ = +25°C.

The RESET output of the TPS775xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS775xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.

Power good (PG) of the TPS776xx is an active high output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS775xx and TPS776xx are offered in 1.5V, 1.6V (TPS77516 only), 1.8V, 2.5V, 2.8V (TPS77628 only), and 3.3V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5V to 5.5V for the TPS77501 and 1.2V to 5.5V for the TPS77601). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS775xx and TPS776xx families are available in 8-pin SOIC and 20-pin TSSOP packages.

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類型 標題 日期
* Data sheet Fast-Transient Response 500mA LDO Voltage Regulators w/RESET Output & PG Output datasheet (Rev. J) 2009年 3月 31日
Application note LDO Noise Demystified (Rev. B) PDF | HTML 2020年 8月 18日
Application note PowerPAD™ Thermally Enhanced Package (Rev. H) 2018年 7月 6日
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017年 8月 9日

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HTSSOP (PWP) 20 Ultra Librarian
SOIC (D) 8 Ultra Librarian

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