TPS7A30
- Input Voltage Range: –3 V to –35 V
- Noise:
- 14 µVRMS (20 Hz to 20 kHz)
- 15.1 µVRMS (10 Hz to 100 kHz)
- Power-Supply Ripple Rejection:
- 72 dB (120 Hz)
- ≥ 55 dB (10 Hz to 700 kHz)
- Adjustable Output: –1.18 V to –33 V
- Maximum Output Current: 200 mA
- Dropout Voltage: 216 mV at 100 mA
- Stable With Ceramic Capacitors ≥ 2.2 µF
- CMOS Logic-Level-Compatible Enable Pin
- Built-In, Fixed, Current Limit and Thermal
Shutdown Protection - Packages: 8-Pin HVSSOP PowerPAD™ and
3-mm × 3-mm VSON - Operating Temperature Range:
–40°C to +125°C
The TPS7A30 series of devices are negative, high-voltage (35 V), ultralow-noise (15.1 µVRMS, 72-dB PSRR) linear regulators that can source a maximum load of 200 mA.
These linear regulators include a CMOS logic-level-compatible enable pin and capacitor-programmable soft-start function that allows for customized power-management schemes. Other features include built-in current limit and thermal shutdown protection to safeguard the device and system during fault conditions.
The TPS7A30 family is designed using bipolar technology, and is ideal for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This design makes the device an excellent choice to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.
In addition, the TPS7A30 family of linear regulators is suitable for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversion, maximum system performance is provided in sensitive instrumentation, test and measurement, audio, and RF applications.
For applications that require positive and negative high-performance rails, consider TIs TPS7A49 family of positive high-voltage, ultralow-noise linear regulators.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TPS7A30 –35-V, –200-mA, Ultralow-Noise, Negative Linear Regulator datasheet (Rev. D) | PDF | HTML | 2015年 6月 9日 |
White paper | Parallel LDO Architecture Design Using Ballast Resistors | PDF | HTML | 2022年 12月 14日 | |
White paper | Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast | PDF | HTML | 2022年 12月 13日 | |
Application note | L1 and L2 EV Charger Electric Vehicle Service Equipment Design Considerations (Rev. B) | 2021年 6月 9日 | ||
Application note | A Topical Index of TI LDO Application Notes (Rev. F) | 2019年 6月 27日 | ||
Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
Selection guide | Low Dropout Regulators Quick Reference Guide (Rev. P) | 2018年 3月 21日 | ||
Technical article | Powering up the performance of sensitive test and measurement systems | PDF | HTML | 2017年 10月 17日 | |
EVM User's guide | TPS7A30-49EVM-567 User's Guide | 2010年 8月 27日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
SIDEGIG-XOVEREVM — 類比、主動交叉音訊外掛程式模組
TPS7A30-49EVM-567 — TPS7A3001 和 TPS7A4901 低壓差 (LDO) 線性穩壓器評估模組
TPS7A3001 TINA-TI Transient Reference Design (Rev. A)
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
HVSSOP (DGN) | 8 | Ultra Librarian |
VSON (DRB) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。