TRS3222E
- ESD Protection for RS-232 bus pins
- ±15-kV Human-body model (HBM)
- ±8-kV IEC61000-4-2, Contact discharge
- ±15-kV IEC61000-4-2, Air-gap discharge
- Meets or exceeds the requirements of TIA/EIA-232-F and ITU v.28 standards
- Operates with 3-V to 5.5-V VCC supply
- Operates up to 500 kbit/s
- Two drivers and two receivers
- Low standby current . . . 1 µA Typ
- External capacitors . . . 4 × 0.1 µF
- Accepts 5-V logic input with 3.3-V supply
- Alternative high-speed pin-compatible device (1 Mbit/s) for TRS3222E
The TRS3222E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND).
The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/µs driver output slew rate.
The TRS3222E can be placed in the power-down mode by setting the power-down ( PWRDOWN) input low, which draws only 1 µA from the power supply. When the device is powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting enable ( EN) high.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | 3-V to 5.5-V Multichannel RS-232 Line Driver and Receiverwith ±15-kV ESD Protection datasheet (Rev. A) | PDF | HTML | 2021年 8月 27日 |
Application note | AN-438 Low Power RS-232C Driver and Receiver in CMOS (Rev. B) | 2013年 4月 26日 | ||
Application note | Understanding Power Requirements in RS-232 Applications (Rev. B) | 2013年 4月 26日 | ||
Application note | Removing Ground Noise in Data Transmission Systems | 2007年 10月 5日 | ||
More literature | RS-232 IEC ESD-Protected Devices From TI (Rev. A) | 2007年 7月 27日 | ||
Application note | Interface Circuits for TIA/EIA-232-F (Rev. A) | 2002年 9月 19日 | ||
Application note | Low-Voltage, Single-Supply 232-Standard Interface Solutions (Rev. A) | 2000年 9月 19日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (DW) | 20 | Ultra Librarian |
SSOP (DB) | 20 | Ultra Librarian |
TSSOP (PW) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。