UC1846-EP
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of -55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree(1)
- Automatic Feed-Forward Compensation
- Programmable Pulse-by-Pulse Current Limiting
- Automatic Symmetry Correction in Push-Pull Configuration
- Enhanced Load-Response Characteristics
- Parallel Operation Capability for Modular Power Systems
- Differential Current-Sense Amplifier With Wide Common-Mode Range
- Double Pulse Suppression
- 500-mA (Peak) Totem-Pole Outputs
- ±1% Bandgap Reference
- Undervoltage Lockout
- Soft-Start Capability
- Shutdown Terminal
- 500-kHz Operation
(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified
performance and environmental limits.
The UC1846-EP control IC provides all of the necessary features to implement fixed-frequency, current-mode control schemes, while maintaining a minimum external parts count. The superior performance of this technique can be measured in improved line regulation, enhanced load-response characteristics, and a simpler, easier-to-design control loop. Topological advantages include inherent pulse-by-pulse current-limiting capability, automatic symmetry correction for push-pull converters, and the ability to parallel power modules, while maintaining equal current sharing.
Protection circuitry includes built-in undervoltage lockout and programmable current limit, in addition to soft-start capability. A shutdown function is also available, which can initiate either a complete shutdown with automatic restart or latch the supply off.
Other features include fully latched operation, double pulse suppression, deadline adjust capability, and a ±1% trimmed bandgap reference.
The UC1846-EP features low outputs in the OFF state.
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技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | UC1846-EP datasheet | 2006年 5月 8日 | |
| * | VID | UC1846-EP VID V6206606 | 2016年 6月 21日 | |
| * | Radiation & reliability report | UC1846MDWREP Reliability Report | 2013年 9月 6日 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (DW) | 16 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點