UC1863-SP

現行

航太級 QMLV、22-V 輸入、1-A 雙輸出諧振模式 500-kHz PWM 控制器

產品詳細資料

Vin (max) (V) 22 Operating temperature range (°C) -55 to 125 Control mode Voltage Topology Full bridge, Half bridge, Push pull Rating Space Features Error amplifier, Multi-topology, Soft start, Soft switching Duty cycle (max) (%) 50
Vin (max) (V) 22 Operating temperature range (°C) -55 to 125 Control mode Voltage Topology Full bridge, Half bridge, Push pull Rating Space Features Error amplifier, Multi-topology, Soft start, Soft switching Duty cycle (max) (%) 50
LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Controls Zero Current Switched (ZCS) or Zero Voltage Switched (ZVS) Quasi-Resonant Converters
  • Zero-Crossing Terminated One-Shot Timer
  • Precision 1%, Soft-Started 5V Reference
  • Programmable Restart Delay Following Fault
  • Voltage-Controlled Oscillator (VCO) with Programmable Minimum and Maximum Frequencies from 10kHz to 1MHz
  • Low Start-Up Current (150µA typical)
  • Dual 1 Amp Peak FET Drivers
  • UVLO Option for Off-Line or DC/DC Applications
  • Controls Zero Current Switched (ZCS) or Zero Voltage Switched (ZVS) Quasi-Resonant Converters
  • Zero-Crossing Terminated One-Shot Timer
  • Precision 1%, Soft-Started 5V Reference
  • Programmable Restart Delay Following Fault
  • Voltage-Controlled Oscillator (VCO) with Programmable Minimum and Maximum Frequencies from 10kHz to 1MHz
  • Low Start-Up Current (150µA typical)
  • Dual 1 Amp Peak FET Drivers
  • UVLO Option for Off-Line or DC/DC Applications

The UC1861-1868 family of ICs is optimized for the control of Zero Current Switched and Zero Voltage Switched quasi-resonant converters. Differences between members of this device family result from the various combinations of UVLO thresholds and output options. Additionally, the one-shot pulse steering logic is configured to program either on-time for ZCS systems (UC1865-1868), or off-time for ZVS applications (UC1861-1864).

The primary control blocks implemented include an error amplifier to compensate the overall system loop and to drive a voltage controlled oscillator (VCO), featuring programmable minimum and maximum frequencies. Triggered by the VCO, the one-shot generates pulses of a programmed maximum width, which can be modulated by the Zero Detection comparator. This circuit facilitates "true" zero current or voltage switching over various line, load, and temperature changes, and is also able to accommodate the resonant components' initial tolerances.

Under-Voltage Lockout is incorporated to facilitate safe starts upon power-up. The supply current during the under-voltage lockout period is typically less than 150µA, and the outputs are actively forced to the low state.

UVLO thresholds for the UC1861/62/65/66 are 16.5V (ON) and 10.5V (OFF), whereas the UC1863/64/67/68 thresholds are 8V (ON) and 7V (OFF). After VCC exceeds the UVLO threshold, a 5V generator is enabled which provides bias for the internal circuits and up to 10mA for external usage.

A Fault comparator serves to detect fault conditions and set a latch while forcing the output drivers low. The Soft-Ref pin serves three functions: providing soft start, restart delay, and the internal system reference.

Each device features dual 1 Amp peak totem pole output drivers for direct interface to power MOSFETS. The outputs are programmed to alternate in the UC1861/63/65/67 devices. The UC1862/64/66/68 outputs operate in unison alllowing a 2 Amp peak current.

The UC1861-1868 family of ICs is optimized for the control of Zero Current Switched and Zero Voltage Switched quasi-resonant converters. Differences between members of this device family result from the various combinations of UVLO thresholds and output options. Additionally, the one-shot pulse steering logic is configured to program either on-time for ZCS systems (UC1865-1868), or off-time for ZVS applications (UC1861-1864).

The primary control blocks implemented include an error amplifier to compensate the overall system loop and to drive a voltage controlled oscillator (VCO), featuring programmable minimum and maximum frequencies. Triggered by the VCO, the one-shot generates pulses of a programmed maximum width, which can be modulated by the Zero Detection comparator. This circuit facilitates "true" zero current or voltage switching over various line, load, and temperature changes, and is also able to accommodate the resonant components' initial tolerances.

Under-Voltage Lockout is incorporated to facilitate safe starts upon power-up. The supply current during the under-voltage lockout period is typically less than 150µA, and the outputs are actively forced to the low state.

UVLO thresholds for the UC1861/62/65/66 are 16.5V (ON) and 10.5V (OFF), whereas the UC1863/64/67/68 thresholds are 8V (ON) and 7V (OFF). After VCC exceeds the UVLO threshold, a 5V generator is enabled which provides bias for the internal circuits and up to 10mA for external usage.

A Fault comparator serves to detect fault conditions and set a latch while forcing the output drivers low. The Soft-Ref pin serves three functions: providing soft start, restart delay, and the internal system reference.

Each device features dual 1 Amp peak totem pole output drivers for direct interface to power MOSFETS. The outputs are programmed to alternate in the UC1861/63/65/67 devices. The UC1862/64/66/68 outputs operate in unison alllowing a 2 Amp peak current.

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類型 標題 日期
* Data sheet Resonant-Mode Power Supply Controllers datasheet (Rev. B) 2007年 9月 13日
* SMD UC1863-SP SMD 5962-92031 2016年 7月 8日
Application brief DLA Approved Optimizations for QML Products (Rev. A) PDF | HTML 2024年 6月 5日
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 2024年 4月 30日
Selection guide TI Space Products (Rev. J) 2024年 2月 12日
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 2023年 8月 31日
Application note QML flow, its importance, and obtaining lot information (Rev. C) 2023年 8月 30日
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 2022年 11月 17日
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022年 10月 19日
Application brief Controlling Input Power for Present and Next-Generation Power Controllers PDF | HTML 2020年 12月 14日
Application note DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 2020年 8月 21日
Application note Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form PDF | HTML 2020年 5月 18日

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