UCC384
- Precision Negative Series Pass Voltage Regulation
- 0.2 V Dropout at 0.5 A
- Wide Input Voltage Range –3.2 V to –15 V
- Low Quiescent Current Irrespective of Load
- Simple Logic Shutdown Interfacing
- –5 V, –12 V, and Adjustable Output
- 2.5% Duty Cycle Short Circuit Protection
The UCC384-x family of negative linear-series pass regulators is tailored for low-dropout applications where low-quiescent power is important. Fabricated with a BCDMOS technology ideally suited for low input-to-output differential applications, the UCC384-x passes 0.5 A while requiring only 0.2 V of input-voltage headroom. Dropout voltage decreases linearly with output current, so that dropout at 50 mA is less than 20 mV.
Quiescent current consumption for the device under normal (non-dropout) conditions is typically 200 uA. An integrated charge pump is internally enabled only when the device is operating near dropout with low VIN. This ensured that the device meets the dropout specifications even for maximum load current and a VIN of 3.2 V with only a modest increase in quiescent current. Quiescent current is always less than 350 uA, with the charge pump enabled. The quiescent current of the UCC384 does not increase with load current.
Short-circuit current is internally limited. The device responds to a sustained overcurrent condition by turning off after a tON delay. The device then stays off for a period, tOFF, that is 40 times the tON delay. The device then begins pulsing on and off at the tON/tOFF duty cycle of 2.5%. This drastically reduces the power dissipation during short circuit such that heat sinking, if at all required, must only accommodate normal operation. An external capacitor sets the on time. The off time is always 40 times tON.
The UCCx84-x can be shutdown to 45 uA (maximum) by pulling the SD/CT pin more positive than 0.7 V. To allow for simpler interfacing, the SD/CT pin may be pulled up to 6 V above the ground pin without turning on clamping diodes.
Internal power dissipation is further controlled with thermal-overload protection circuitry. Thermal shutdown occurs if the junction temperature exceeds 140°C. The chip remains off until the temperature has dropped 20°C (TJ = 120°C).
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | Low-Dropout 0.5-A Negative Linear Regulator datasheet (Rev. D) | 2002年 2月 5日 | |
Application note | LDO Noise Demystified (Rev. B) | PDF | HTML | 2020年 8月 18日 | |
Application note | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 2017年 8月 9日 |
設計與開發
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
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