UCD7242-EP

現行

數位雙同步降壓功率驅動器,UCD7242-EP

產品詳細資料

Operating temperature range (°C) -55 to 125 Rating HiRel Enhanced Product
Operating temperature range (°C) -55 to 125 Rating HiRel Enhanced Product
VQFN-HR (RSJ) 32 36 mm² 6 x 6
  • Fully Integrated Power Switches With Drivers for
    Dual Synchronous Buck Converters
  • Full Compatibility With TI Fusion Digital Power Supply
    Controllers, Such as the UCD92xx Family
  • Wide Input Voltage Range: 4.75 V to 18 V
    Operational Down to 2.2-V Input With an
    External Bias Supply
  • Up to 10-A Output Current per Channel
  • Operational to 2-MHz Switching Frequency
  • High Side Current Limit With Current Limit Flag
  • Onboard Regulated 6 V Driver Supply From VIN
  • Thermal Protection
  • Temperature Sense Output – Voltage Proportional
    to Chip Temperature
  • UVLO and OVLO Circuits Ensure Proper Drive Voltage
  • RoHS Compliant
  • Accurate On-Die Current Sensing (±5%)
  • Fully Integrated Power Switches With Drivers for
    Dual Synchronous Buck Converters
  • Full Compatibility With TI Fusion Digital Power Supply
    Controllers, Such as the UCD92xx Family
  • Wide Input Voltage Range: 4.75 V to 18 V
    Operational Down to 2.2-V Input With an
    External Bias Supply
  • Up to 10-A Output Current per Channel
  • Operational to 2-MHz Switching Frequency
  • High Side Current Limit With Current Limit Flag
  • Onboard Regulated 6 V Driver Supply From VIN
  • Thermal Protection
  • Temperature Sense Output – Voltage Proportional
    to Chip Temperature
  • UVLO and OVLO Circuits Ensure Proper Drive Voltage
  • RoHS Compliant
  • Accurate On-Die Current Sensing (±5%)

The UCD7242 is a complete power system ready to drive two independent buck power supplies. High side MOSFETs, low side MOSFETs, drivers, current sensing circuitry and necessary protection functions are all integrated into one monolithic solution to facilitate minimum size and maximum efficiency. Driver circuits provide high charge and discharge current for the high-side NMOS switch and the low-side NMOS synchronous rectifier in a synchronous buck circuit. The MOSFET gates are driven to +6.25 V by an internally regulated VGG supply. The internal VGG regulator can be disabled to permit the user to supply an independent gate drive voltage. This flexibility allows a wide power conversion input voltage range of 2.2 V to 18 V. Internal under voltage lockout (UVLO) logic ensures VGG is good before allowing chip operation.

The synchronous rectifier enable (SRE) pin controls whether or not the low-side MOSFET is turned on when the PWM signal is low. When SRE is high the part operates in continuous conduction mode for all loads. In this mode the drive logic block uses the PWM signal to control both the high-side and low-side gate drive signals. Dead time is also optimized to prevent cross conduction. When SRE is low, the part operates in discontinuous conduction mode at light loads. In this mode the low-side MOSFET is always held off.

On-board comparators monitor the current through the high side switch to safeguard the power stage from sudden high current loads. Blanking delay is set for the high side comparator to avoid false reports coincident with switching edge noise. In the event of an over-current fault, the high-side FET is turned off and the Fault Flag (FLT) is asserted to alert the controller.

MOSFET current is measured and monitored by a precision integrated current sense element. This method provides an accuracy of ±5% over most of the load range. The amplified signal is available for use by the controller on the IMON pin.

An on-chip temperature sense converts the die temperature to a voltage at the TMON pin for the controller’s use. If the die temperature exceeds 170°C, the temperature sensor initiates a thermal shutdown that halts output switching and sets the FLT flag. Normal operation resumes when the die temperature falls below the thermal hysteresis band.

The UCD7242 is a complete power system ready to drive two independent buck power supplies. High side MOSFETs, low side MOSFETs, drivers, current sensing circuitry and necessary protection functions are all integrated into one monolithic solution to facilitate minimum size and maximum efficiency. Driver circuits provide high charge and discharge current for the high-side NMOS switch and the low-side NMOS synchronous rectifier in a synchronous buck circuit. The MOSFET gates are driven to +6.25 V by an internally regulated VGG supply. The internal VGG regulator can be disabled to permit the user to supply an independent gate drive voltage. This flexibility allows a wide power conversion input voltage range of 2.2 V to 18 V. Internal under voltage lockout (UVLO) logic ensures VGG is good before allowing chip operation.

The synchronous rectifier enable (SRE) pin controls whether or not the low-side MOSFET is turned on when the PWM signal is low. When SRE is high the part operates in continuous conduction mode for all loads. In this mode the drive logic block uses the PWM signal to control both the high-side and low-side gate drive signals. Dead time is also optimized to prevent cross conduction. When SRE is low, the part operates in discontinuous conduction mode at light loads. In this mode the low-side MOSFET is always held off.

On-board comparators monitor the current through the high side switch to safeguard the power stage from sudden high current loads. Blanking delay is set for the high side comparator to avoid false reports coincident with switching edge noise. In the event of an over-current fault, the high-side FET is turned off and the Fault Flag (FLT) is asserted to alert the controller.

MOSFET current is measured and monitored by a precision integrated current sense element. This method provides an accuracy of ±5% over most of the load range. The amplified signal is available for use by the controller on the IMON pin.

An on-chip temperature sense converts the die temperature to a voltage at the TMON pin for the controller’s use. If the die temperature exceeds 170°C, the temperature sensor initiates a thermal shutdown that halts output switching and sets the FLT flag. Normal operation resumes when the die temperature falls below the thermal hysteresis band.

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類型 標題 日期
* Data sheet Digital Dual Synchronous-Buck Power Driver, UCD7242-EP datasheet 2013年 10月 30日
* VID UCD7242-EP VID V6214601 2016年 6月 21日

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VQFN-HR (RSJ) 32 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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