TLV2541
12-Bit, 200 kSPS ADC, Serial Out, TMS320 Compatible (up to 10MHz), Single Ch.
TLV2541
- Maximum Throughput . . . 140/200 KSPS
- Built-In Conversion Clock
- INL/DNL: ±1 LSB Max, SINAD: 72 dB,
SFDR: 85 dB, fi = 20 kHz - SPI/DSP-Compatible Serial Interface
- Single Supply: 2.7 Vdc to 5.5 Vdc
- Rail-to-Rail Analog Input With 500 kHz BW
- Three Options Available:
- TLV2541: Single Channel Input
- TLV2542: Dual Channels With Autosweep
- TLV2545: Single Channel With Pseudo-Differential Input
- Low Power With Autopower Down
- Operating Current: 1 mA at 2.7 V, 1.5 mA at 5 V
Autopower Down: 2 µA at 2.7 V, 5 µA at 5 V
- Operating Current: 1 mA at 2.7 V, 1.5 mA at 5 V
- Small 8-Pin MSOP and SOIC Packages
TMS320 is a trademark of Texas Instruments.
The TLV2541, TLV2542, and TLV2545 are a family of high performance, 12-bit, low power, miniature, CMOS analog-to-digital converters (ADC). The TLV254x family operates from a single 2.7-V to 5.5-V supply. Devices are available with single, dual, or single pseudo-differential inputs. Each device has a chip select (CS), serial clock (SCLK), and serial data output (SDO) that provides a direct 3-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a TMS320™ DSP, a frame sync signal (FS) can be used to indicate the start of a serial data frame on CS for all devices or FS for the TLV2541.
TLV2541, TLV2542, and TLV2545 are designed to operate with very low power consumption. The power saving feature is further enhanced with an autopower-down mode. This product family features a high-speed serial link to modern host processors with SCLK up to 20 MHz. The maximum SCLK frequency is dependent upon the mode of operation (see Table 1). The TLV254x family uses the built-in oscillator as the conversion clock, providing a 3.5-µs conversion time.
Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | 2.7 V to 5.5 V Low-Power 12-Bit 140/200 KSPS, Serial Analog-To-Digital Converter datasheet (Rev. E) | 12 Apr 2010 | |
E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 21 May 2015 | ||
Application note | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 17 Mar 2011 | ||
Application note | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 10 Nov 2010 |
Design & development
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5-6KINTERFACE — 5-6K Interface Evaluation Module
The interface board consists of two signal conditioning sites, two serial EVM sites, and a parallel EVM site. Regardless of the interface type, all EVMs compatible with the 5-6K Interface Board have a standard analog interface and standard power connector. Three position screw terminals J1 and J2 (...)
ANALOG-ENGINEER-CALC — Analog engineer's calculator
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
TINA-TI — SPICE-based analog simulation program
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
SOIC (D) | 8 | Ultra Librarian |
VSSOP (DGK) | 8 | Ultra Librarian |
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