The CLC001 is a monolithic, high-speed cable driver designed for use in SMPTE 259M serial digital video and ITU-T G.703 serial digital data transmission applications. The CLC001 drives 75
transmission lines (Belden 8281 or equivalent) at data rates up to 622 Mbps. Controlled output rise and fall times (400 ps typical) minimize transition-induced jitter. The output voltage swing is adjustable from 800 mVp-p to 1.0 Vp-p using an external resistor.
The CLC001's output stage consumes less power than other designs. The differential inputs accept LVDS signal levels, LVPECL levels directly or PECL with attenuation networks.
All these make the CLC001 an excellent general purpose high speed driver for high-speed, long distance data transmission applications.
The CLC001 is powered from a single +3.3V supply and comes in a small 8-pin SOIC package.
| Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | CLC001 Serial Digital Cable Driver with Adjustable Outputs datasheet (Rev. B) | 15 Feb 2006 | |
| Application note | AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) | 26 Apr 2013 | ||
| Application note | AN-2059 Replacing the CLC001 Cable Driver with the LMH0001 (Rev. B) | 26 Apr 2013 | ||
| Application note | AN-2145 Power Considerations for SDI Products (Rev. B) | 26 Apr 2013 | ||
| Application note | AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) | 26 Apr 2013 | ||
| Application note | High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems | 12 Nov 2009 | ||
| White paper | Hundreds of Megabits @ Hundreds of Meters: Extend the Transmis Length for LVDS | 01 Sep 2004 | ||
| Application note | 3.3V Cable Driver And Equalizer Drive Mega-Bits @ Many Meters | 06 Mär 2003 | ||
| White paper | Making the Most of Your LVDS - 5 Tips for Buffering Signal Integrity Headaches | 01 Aug 2001 |
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| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
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