AM4379

ACTIVO

Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT, gráficos 3D

Haga su pedido ahora

Hoja de datos

document-pdfAcrobat AM437x Sitara™ Processors datasheet (Rev. E) (Inglés) PDF | HTML

Guías de usuario

document-pdfAcrobat
AM437x and AMIC120 ARM® Cortex™-A9 Processors Technical Reference Manual (Rev. I) (Inglés)

Errata

document-pdfAcrobat
AM437x Sitara Processors Silicon Errata (Silicon Revisions 1.1, 1.2) (Rev. D) (Inglés)

AM4379

ACTIVO

Hoja de datos

Haga su pedido ahora

Detalles del producto

Arm CPU

1 Arm Cortex-A9

Arm (max) (MHz)

800, 1000

Coprocessors

GPU, PRU-ICSS

CPU

32-bit

Graphics acceleration

1 3D

Display type

1 LCD

Protocols

EtherCAT, EtherNet/IP, Ethernet, Profibus, Profinet, Sercos

Ethernet MAC

2-Port 1Gb switch

Hardware accelerators

PRU-ICSS, SGX530 Graphics, Security Accelerator

Features

General purpose, Networking

Operating system

Linux, RTOS

Security

Cryptography, Debug security, Secure boot, Trusted execution environment

Rating

Catalog

Power supply solution

TPS65216, TPS65218D0

Operating temperature range (°C)

-40 to 105

Arm CPU

1 Arm Cortex-A9

Arm (max) (MHz)

800, 1000

Coprocessors

GPU, PRU-ICSS

CPU

32-bit

Graphics acceleration

1 3D

Display type

1 LCD

Protocols

EtherCAT, EtherNet/IP, Ethernet, Profibus, Profinet, Sercos

Ethernet MAC

2-Port 1Gb switch

Hardware accelerators

PRU-ICSS, SGX530 Graphics, Security Accelerator

Features

General purpose, Networking

Operating system

Linux, RTOS

Security

Cryptography, Debug security, Secure boot, Trusted execution environment

Rating

Catalog

Power supply solution

TPS65216, TPS65218D0

Operating temperature range (°C)

-40 to 105

NFBGA (ZDN)

491

289 mm² 17 x 17

Highlights
- Sitara™ ARM^® Cortex^®-A9 32-Bit RISC Processor With Processing Speed up to 1000 MHz
  - NEON™ SIMD Coprocessor and Vector Floating Point (VFPv3) Coprocessor
  - 32KB of Both L1 Instruction and Data Cache
  - 256KB of L2 Cache or L3 RAM
- 32-Bit LPDDR2, DDR3, and DDR3L Support
- General-Purpose Memory Support (NAND, NOR, SRAM) Supporting up to 16-Bit ECC
- SGX530 Graphics Engine
- Display Subsystem
- Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
- Real-Time Clock (RTC)
- Up to Two USB 2.0 High-Speed Dual-Role (Host or Device) Ports With Integrated PHY
- 10, 100, and 1000 Ethernet Switch Supporting up to Two Ports
- Serial Interfaces:
  - Two Controller Area Network (CAN) Ports
  - Six UARTs, Two McASPs, Five McSPIs, Three I²C Ports, One QSPI, and One HDQ or 1-Wire
- Security
  - Crypto Hardware Accelerators (AES, SHA, RNG, DES, and 3DES)
  - Secure Boot (Avaliable Only on AM437x High-Security [AM437xHS] Devices)
- Two 12-Bit Successive Approximation Register (SAR) ADCs
- Up to Three 32-Bit Enhanced Capture (eCAP) Modules
- Up to Three Enhanced Quadrature Encoder Pulse (eQEP) Modules
- Up to Six Enhanced High-Resolution PWM (eHRPWM) Modules
MPU Subsystem
- ARM Cortex-A9 32-Bit RISC Microprocessor With Processing Speed up to 1000 MHz
- 32KB of Both L1 Instruction and Data Cache
- 256KB of L2 Cache (Option to Configure as L3 RAM)
- 256KB of On-Chip Boot ROM
- 64KB of On-Chip RAM
- Secure Control Module (SCM) (Avaliable Only on AM437xHS Devices)
- Emulation and Debug
  - JTAG
  - Embedded Trace Buffer
- Interrupt Controller
On-Chip Memory (Shared L3 RAM)
- 256KB of General-Purpose On-Chip Memory Controller (OCMC) RAM
- Accessible to All Masters
- Supports Retention for Fast Wakeup
- Up to 512KB of Total Internal RAM
  (256KB of ARM Memory Configured as L3 RAM + 256KB of OCMC RAM)
External Memory Interfaces (EMIFs)
- DDR Controllers:
  - LPDDR2: 266-MHz Clock (LPDDR2-533 Data Rate)
  - DDR3 and DDR3L: 400-MHz Clock (DDR-800 Data Rate)
  - 32-Bit Data Bus
  - 2GB of Total Addressable Space
  - Supports One x32, Two x16, or Four x8 Memory Device Configurations
General-Purpose Memory Controller (GPMC)
- Flexible 8- and 16-Bit Asynchronous Memory Interface With up to Seven Chip Selects (NAND, NOR, Muxed-NOR, and SRAM)
- Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
- Uses Hamming Code to Support 1-Bit ECC
Error Locator Module (ELM)
- Used With the GPMC to Locate Addresses of Data Errors From Syndrome Polynomials Generated Using a BCH Algorithm
- Supports 4-, 8-, and 16-Bit Per 512-Byte Block Error Location Based on BCH Algorithms
Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
- Supports Protocols such as EtherCAT^®, PROFIBUS^®, PROFINET^®, and EtherNet/IP™, EnDat 2.2, and More
- Two Programmable Real-Time Units (PRUs) Subsystems With Two PRU Cores Each
  - Each Core is a 32-Bit Load and Store RISC Processor Capable of Running at 200 MHz
  - 12KB (PRU-ICSS1), 4KB (PRU-ICSS0) of Instruction RAM With Single-Error Detection (Parity)
  - 8KB (PRU-ICSS1), 4KB (PRU-ICSS0) of Data RAM With Single-Error Detection (Parity)
  - Single-Cycle 32-Bit Multiplier With 64-Bit Accumulator
  - Enhanced GPIO Module Provides Shift-In and Shift-Out Support and Parallel Latch on External Signal
- 12KB (PRU-ICSS1 Only) of Shared RAM With Single-Error Detection (Parity)
- Three 120-Byte Register Banks Accessible by Each PRU
- Interrupt Controller Module (INTC) for Handling System Input Events
- Local Interconnect Bus for Connecting Internal and External Masters to the Resources Inside the PRU-ICSS
- Peripherals Inside the PRU-ICSS
  - One UART Port With Flow Control Pins, Supports up to 12 Mbps
  - One eCAP Module
  - Two MII Ethernet Ports that Support Industrial Ethernet, such as EtherCAT
  - One MDIO Port
- Industrial Communication is Supported by Two PRU-ICSS Subsystems
Power, Reset, and Clock Management (PRCM) Module
- Controls the Entry and Exit of Deep-Sleep Modes
- Responsible for Sleep Sequencing, Power Domain Switch-Off Sequencing, Wake-Up Sequencing, and Power Domain Switch-On Sequencing
- Clocks
  - Integrated High-Frequency Oscillator Used to Generate a Reference Clock (19.2, 24, 25, and 26 MHz) for Various System and Peripheral Clocks
  - Supports Individual Clock Enable and Disable Control for Subsystems and Peripherals to Facilitate Reduced Power Consumption
  - Five ADPLLs to Generate System Clocks (MPU Subsystem, DDR Interface, USB, and Peripherals [MMC and SD, UART, SPI, I²C], L3, L4, Ethernet, GFX [SGX530], and LCD Pixel Clock)
- Power
  - Two Nonswitchable Power Domains (RTC and Wake-Up Logic [WAKE-UP])
  - Three Switchable Power Domains (MPU Subsystem, SGX530 [GFX], Peripherals and Infrastructure [PER])
  - Dynamic Voltage Frequency Scaling (DVFS)
Real-Time Clock (RTC)
- Real-Time Date (Day, Month, Year, and Day of Week) and Time (Hours, Minutes, and Seconds) Information
- Internal 32.768-kHz Oscillator, RTC Logic, and 1.1-V Internal LDO
- Independent Power-On-Reset (RTC_PWRONRSTn) Input
- Dedicated Input Pin (RTC_WAKEUP) for External Wake Events
- Programmable Alarm Can Generate Internal Interrupts to the PRCM for Wakeup or Cortex-A9 for Event Notification
- Programmable Alarm Can Be Used With External Output (RTC_PMIC_EN) to Enable the Power-Management IC to Restore Non-RTC Power Domains
Peripherals
- Up to Two USB 2.0 High-Speed Dual-Role (Host or Device) Ports With Integrated PHY
- Up to Two Industrial Gigabit Ethernet MACs
  (10, 100, and 1000 Mbps)
  - Integrated Switch
  - Each MAC Supports MII, RMII, and RGMII and MDIO Interfaces
  - Ethernet MACs and Switch Can Operate Independent of Other Functions
  - IEEE 1588v2 Precision Time Protocol (PTP)
- Up to Two CAN Ports
  - Supports CAN Version 2 Parts A and B
- Up to Two Multichannel Audio Serial Ports (McASPs)
  - Transmit and Receive Clocks up to 50 MHz
  - Up to Four Serial Data Pins Per McASP Port With Independent TX and RX Clocks
  - Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
  - Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
  - FIFO Buffers for Transmit and Receive (256 Bytes)
- Up to Six UARTs
  - All UARTs Support IrDA and CIR Modes
  - All UARTs Support RTS and CTS Flow Control
  - UART1 Supports Full Modem Control
- Up to Five Master and Slave McSPIs
  - McSPI0–McSPI2 Support up to Four Chip Selects
  - McSPI3 and McSPI4 Support up to Two Chip Selects
  - Up to 48 MHz
- One Quad-SPI
  - Supports eXecute In Place (XIP) from Serial NOR FLASH
- One Dallas 1-Wire^® and HDQ Serial Interface
- Up to Three MMC, SD, and SDIO Ports
  - 1-, 4-, and 8-Bit MMC, SD, and SDIO Modes
  - 1.8- or 3.3-V Operation on All Ports
  - Up to 48-MHz Clock
  - Supports Card Detect and Write Protect
  - Complies With MMC4.3 and SD and SDIO 2.0 Specifications
- Up to Three I²C Master and Slave Interfaces
  - Standard Mode (up to 100 kHz)
  - Fast Mode (up to 400 kHz)
- Up to Six Banks of General-Purpose I/O (GPIO)
  - 32 GPIOs per Bank (Multiplexed With Other Functional Pins)
  - GPIOs Can be Used as Interrupt Inputs (up to Two Interrupt Inputs per Bank)
- Up to Three External DMA Event Inputs That Can Also be Used as Interrupt Inputs
- Twelve 32-Bit General-Purpose Timers
  - DMTIMER1 is a 1-ms Timer Used for Operating System (OS) Ticks
  - DMTIMER4–DMTIMER7 are Pinned Out
- One Public Watchdog Timer
- One Free-Running, High-Resolution 32-kHz Counter (synctimer32K)
- One Secure Watchdog Timer (Avaliable Only on AM437xHS Devices)
- SGX530 3D Graphics Engine
  - Tile-Based Architecture Delivering up to 20M Poly/sec
  - Universal Scalable Shader Engine is a Multithreaded Engine Incorporating Pixel and Vertex Shader Functionality
  - Advanced Shader Feature Set in Excess of Microsoft VS3.0, PS3.0, and OGL2.0
  - Industry Standard API Support of Direct3D Mobile, OGL-ES 1.1 and 2.0
  - Fine-Grained Task Switching, Load Balancing, and Power Management
  - Advanced Geometry DMA-Driven Operation for Minimum CPU Interaction
  - Programmable High-Quality Image Anti-Aliasing
  - Fully Virtualized Memory Addressing for OS Operation in a Unified Memory Architecture
- Display Subsystem
  - Display Modes
    - Programmable Pixel Memory Formats (Palletized: 1-, 2-, 4-, and 8-Bits Per Pixel; RGB 16- and 24-Bits Per Pixel; and YUV 4:2:2)
    - 256- × 24-Bit Entries Palette in RGB
    - Up to 2048 × 2048 Resolution
  - Display Support
    - Four Types of Displays Are Supported: Passive and Active Colors; Passive and Active Monochromes
    - 4- and 8-Bit Monochrome Passive Panel Interface Support (15 Grayscale Levels Supported Using Dithering Block)
    - RGB 8-Bit Color Passive Panel Interface Support (3,375 Colors Supported for Color Panel Using Dithering Block)
    - RGB 12-, 16-, 18-, and 24-Bit Active Panel Interface Support (Replicated or Dithered Encoded Pixel Values)
    - Remote Frame Buffer (Embedded in the LCD Panel) Support Through the RFBI Module
    - Partial Refresh of the Remote Frame Buffer Through the RFBI Module
    - Partial Display
    - Multiple Cycles Output Format on 8-, 9-, 12-, and 16-Bit Interface (TDM)
  - Signal Processing
    - Overlay and Windowing Support for One Graphics Layer (RGB or CLUT) and Two Video Layers (YUV 4:2:2, RGB16, and RGB24)
    - RGB 24-Bit Support on the Display Interface, Optionally Dithered to RGB 18‑Bit Pixel Output Plus 6-Bit Frame Rate Control (Spatial and Temporal)
    - Transparency Color Key (Source and Destination)
    - Synchronized Buffer Update
    - Gamma Curve Support
    - Multiple-Buffer Support
    - Cropping Support
    - Color Phase Rotation
- Two 12-Bit SAR ADCs (ADC0, ADC1)
  - 867K Samples Per Second
  - Input Can Be Selected from Any of the Eight Analog Inputs Multiplexed Through an 8:1 Analog Switch
  - ADC0 Can Be Configured to Operate as a 4‑, 5-, or 8-Wire Resistive Touch Screen Controller (TSC)
- Up to Three 32-Bit eCAP Modules
  - Configurable as Three Capture Inputs or Three Auxiliary PWM Outputs
- Up to Six Enhanced eHRPWM Modules
  - Dedicated 16-Bit Time-Base Counter With Time and Frequency Controls
  - Configurable as Six Single-Ended, Six Dual-Edge Symmetric, or Three Dual-Edge Asymmetric Outputs
- Up to Three 32-Bit eQEP Modules
Device Identification
- Factory Programmable Electrical Fuse Farm (FuseFarm)
  - Production ID
  - Device Part Number (Unique JTAG ID)
  - Device Revision (Readable by Host ARM)
  - Security Keys (Avaliable Only on AM437xHS Devices)
  - Feature Identification
Debug Interface Support
- JTAG and cJTAG for ARM (Cortex-A9 and PRCM) and PRU-ICSS Debug
- Supports Real-Time Trace Pins (for Cortex-A9)
- 64-KB Embedded Trace Buffer (ETB)
- Supports Device Boundary Scan
- Supports IEEE 1500
DMA
- On-Chip Enhanced DMA Controller (EDMA) Has Three Third-Party Transfer Controllers (TPTCs) and One Third-Party Channel Controller (TPCC), Which Supports up to 64 Programmable Logical Channels and Eight QDMA Channels
- EDMA is Used for:
  - Transfers to and from On-Chip Memories
  - Transfers to and from External Storage (EMIF, GPMC, and Slave Peripherals)
InterProcessor Communication (IPC)
- Integrates Hardware-Based Mailbox for IPC and Spinlock for Process Synchronization Between the Cortex-A9, PRCM, and PRU-ICSS
Boot Modes
- Boot Mode is Selected Through Boot Configuration Pins Latched on the Rising Edge of the PWRONRSTn Reset Input Pin
Camera
- Dual Port 8- and 10-Bit BT656 Interface
- Dual Port 8- and 10-Bit Including External Syncs
- Single Port 12-Bit
- YUV422/RGB422 and BT656 Input Format
- RAW Format
- Pixel Clock Rate up to 75 MHz
Package
- 491-Pin BGA Package (17-mm × 17-mm) (ZDN Suffix), 0.65-mm Ball Pitch With Via Channel Array Technology to Enable Low-Cost Routing

Highlights
- Sitara™ ARM^® Cortex^®-A9 32-Bit RISC Processor With Processing Speed up to 1000 MHz
  - NEON™ SIMD Coprocessor and Vector Floating Point (VFPv3) Coprocessor
  - 32KB of Both L1 Instruction and Data Cache
  - 256KB of L2 Cache or L3 RAM
- 32-Bit LPDDR2, DDR3, and DDR3L Support
- General-Purpose Memory Support (NAND, NOR, SRAM) Supporting up to 16-Bit ECC
- SGX530 Graphics Engine
- Display Subsystem
- Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
- Real-Time Clock (RTC)
- Up to Two USB 2.0 High-Speed Dual-Role (Host or Device) Ports With Integrated PHY
- 10, 100, and 1000 Ethernet Switch Supporting up to Two Ports
- Serial Interfaces:
  - Two Controller Area Network (CAN) Ports
  - Six UARTs, Two McASPs, Five McSPIs, Three I²C Ports, One QSPI, and One HDQ or 1-Wire
- Security
  - Crypto Hardware Accelerators (AES, SHA, RNG, DES, and 3DES)
  - Secure Boot (Avaliable Only on AM437x High-Security [AM437xHS] Devices)
- Two 12-Bit Successive Approximation Register (SAR) ADCs
- Up to Three 32-Bit Enhanced Capture (eCAP) Modules
- Up to Three Enhanced Quadrature Encoder Pulse (eQEP) Modules
- Up to Six Enhanced High-Resolution PWM (eHRPWM) Modules
MPU Subsystem
- ARM Cortex-A9 32-Bit RISC Microprocessor With Processing Speed up to 1000 MHz
- 32KB of Both L1 Instruction and Data Cache
- 256KB of L2 Cache (Option to Configure as L3 RAM)
- 256KB of On-Chip Boot ROM
- 64KB of On-Chip RAM
- Secure Control Module (SCM) (Avaliable Only on AM437xHS Devices)
- Emulation and Debug
  - JTAG
  - Embedded Trace Buffer
- Interrupt Controller
On-Chip Memory (Shared L3 RAM)
- 256KB of General-Purpose On-Chip Memory Controller (OCMC) RAM
- Accessible to All Masters
- Supports Retention for Fast Wakeup
- Up to 512KB of Total Internal RAM
  (256KB of ARM Memory Configured as L3 RAM + 256KB of OCMC RAM)
External Memory Interfaces (EMIFs)
- DDR Controllers:
  - LPDDR2: 266-MHz Clock (LPDDR2-533 Data Rate)
  - DDR3 and DDR3L: 400-MHz Clock (DDR-800 Data Rate)
  - 32-Bit Data Bus
  - 2GB of Total Addressable Space
  - Supports One x32, Two x16, or Four x8 Memory Device Configurations
General-Purpose Memory Controller (GPMC)
- Flexible 8- and 16-Bit Asynchronous Memory Interface With up to Seven Chip Selects (NAND, NOR, Muxed-NOR, and SRAM)
- Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
- Uses Hamming Code to Support 1-Bit ECC
Error Locator Module (ELM)
- Used With the GPMC to Locate Addresses of Data Errors From Syndrome Polynomials Generated Using a BCH Algorithm
- Supports 4-, 8-, and 16-Bit Per 512-Byte Block Error Location Based on BCH Algorithms
Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
- Supports Protocols such as EtherCAT^®, PROFIBUS^®, PROFINET^®, and EtherNet/IP™, EnDat 2.2, and More
- Two Programmable Real-Time Units (PRUs) Subsystems With Two PRU Cores Each
  - Each Core is a 32-Bit Load and Store RISC Processor Capable of Running at 200 MHz
  - 12KB (PRU-ICSS1), 4KB (PRU-ICSS0) of Instruction RAM With Single-Error Detection (Parity)
  - 8KB (PRU-ICSS1), 4KB (PRU-ICSS0) of Data RAM With Single-Error Detection (Parity)
  - Single-Cycle 32-Bit Multiplier With 64-Bit Accumulator
  - Enhanced GPIO Module Provides Shift-In and Shift-Out Support and Parallel Latch on External Signal
- 12KB (PRU-ICSS1 Only) of Shared RAM With Single-Error Detection (Parity)
- Three 120-Byte Register Banks Accessible by Each PRU
- Interrupt Controller Module (INTC) for Handling System Input Events
- Local Interconnect Bus for Connecting Internal and External Masters to the Resources Inside the PRU-ICSS
- Peripherals Inside the PRU-ICSS
  - One UART Port With Flow Control Pins, Supports up to 12 Mbps
  - One eCAP Module
  - Two MII Ethernet Ports that Support Industrial Ethernet, such as EtherCAT
  - One MDIO Port
- Industrial Communication is Supported by Two PRU-ICSS Subsystems
Power, Reset, and Clock Management (PRCM) Module
- Controls the Entry and Exit of Deep-Sleep Modes
- Responsible for Sleep Sequencing, Power Domain Switch-Off Sequencing, Wake-Up Sequencing, and Power Domain Switch-On Sequencing
- Clocks
  - Integrated High-Frequency Oscillator Used to Generate a Reference Clock (19.2, 24, 25, and 26 MHz) for Various System and Peripheral Clocks
  - Supports Individual Clock Enable and Disable Control for Subsystems and Peripherals to Facilitate Reduced Power Consumption
  - Five ADPLLs to Generate System Clocks (MPU Subsystem, DDR Interface, USB, and Peripherals [MMC and SD, UART, SPI, I²C], L3, L4, Ethernet, GFX [SGX530], and LCD Pixel Clock)
- Power
  - Two Nonswitchable Power Domains (RTC and Wake-Up Logic [WAKE-UP])
  - Three Switchable Power Domains (MPU Subsystem, SGX530 [GFX], Peripherals and Infrastructure [PER])
  - Dynamic Voltage Frequency Scaling (DVFS)
Real-Time Clock (RTC)
- Real-Time Date (Day, Month, Year, and Day of Week) and Time (Hours, Minutes, and Seconds) Information
- Internal 32.768-kHz Oscillator, RTC Logic, and 1.1-V Internal LDO
- Independent Power-On-Reset (RTC_PWRONRSTn) Input
- Dedicated Input Pin (RTC_WAKEUP) for External Wake Events
- Programmable Alarm Can Generate Internal Interrupts to the PRCM for Wakeup or Cortex-A9 for Event Notification
- Programmable Alarm Can Be Used With External Output (RTC_PMIC_EN) to Enable the Power-Management IC to Restore Non-RTC Power Domains
Peripherals
- Up to Two USB 2.0 High-Speed Dual-Role (Host or Device) Ports With Integrated PHY
- Up to Two Industrial Gigabit Ethernet MACs
  (10, 100, and 1000 Mbps)
  - Integrated Switch
  - Each MAC Supports MII, RMII, and RGMII and MDIO Interfaces
  - Ethernet MACs and Switch Can Operate Independent of Other Functions
  - IEEE 1588v2 Precision Time Protocol (PTP)
- Up to Two CAN Ports
  - Supports CAN Version 2 Parts A and B
- Up to Two Multichannel Audio Serial Ports (McASPs)
  - Transmit and Receive Clocks up to 50 MHz
  - Up to Four Serial Data Pins Per McASP Port With Independent TX and RX Clocks
  - Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
  - Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
  - FIFO Buffers for Transmit and Receive (256 Bytes)
- Up to Six UARTs
  - All UARTs Support IrDA and CIR Modes
  - All UARTs Support RTS and CTS Flow Control
  - UART1 Supports Full Modem Control
- Up to Five Master and Slave McSPIs
  - McSPI0–McSPI2 Support up to Four Chip Selects
  - McSPI3 and McSPI4 Support up to Two Chip Selects
  - Up to 48 MHz
- One Quad-SPI
  - Supports eXecute In Place (XIP) from Serial NOR FLASH
- One Dallas 1-Wire^® and HDQ Serial Interface
- Up to Three MMC, SD, and SDIO Ports
  - 1-, 4-, and 8-Bit MMC, SD, and SDIO Modes
  - 1.8- or 3.3-V Operation on All Ports
  - Up to 48-MHz Clock
  - Supports Card Detect and Write Protect
  - Complies With MMC4.3 and SD and SDIO 2.0 Specifications
- Up to Three I²C Master and Slave Interfaces
  - Standard Mode (up to 100 kHz)
  - Fast Mode (up to 400 kHz)
- Up to Six Banks of General-Purpose I/O (GPIO)
  - 32 GPIOs per Bank (Multiplexed With Other Functional Pins)
  - GPIOs Can be Used as Interrupt Inputs (up to Two Interrupt Inputs per Bank)
- Up to Three External DMA Event Inputs That Can Also be Used as Interrupt Inputs
- Twelve 32-Bit General-Purpose Timers
  - DMTIMER1 is a 1-ms Timer Used for Operating System (OS) Ticks
  - DMTIMER4–DMTIMER7 are Pinned Out
- One Public Watchdog Timer
- One Free-Running, High-Resolution 32-kHz Counter (synctimer32K)
- One Secure Watchdog Timer (Avaliable Only on AM437xHS Devices)
- SGX530 3D Graphics Engine
  - Tile-Based Architecture Delivering up to 20M Poly/sec
  - Universal Scalable Shader Engine is a Multithreaded Engine Incorporating Pixel and Vertex Shader Functionality
  - Advanced Shader Feature Set in Excess of Microsoft VS3.0, PS3.0, and OGL2.0
  - Industry Standard API Support of Direct3D Mobile, OGL-ES 1.1 and 2.0
  - Fine-Grained Task Switching, Load Balancing, and Power Management
  - Advanced Geometry DMA-Driven Operation for Minimum CPU Interaction
  - Programmable High-Quality Image Anti-Aliasing
  - Fully Virtualized Memory Addressing for OS Operation in a Unified Memory Architecture
- Display Subsystem
  - Display Modes
    - Programmable Pixel Memory Formats (Palletized: 1-, 2-, 4-, and 8-Bits Per Pixel; RGB 16- and 24-Bits Per Pixel; and YUV 4:2:2)
    - 256- × 24-Bit Entries Palette in RGB
    - Up to 2048 × 2048 Resolution
  - Display Support
    - Four Types of Displays Are Supported: Passive and Active Colors; Passive and Active Monochromes
    - 4- and 8-Bit Monochrome Passive Panel Interface Support (15 Grayscale Levels Supported Using Dithering Block)
    - RGB 8-Bit Color Passive Panel Interface Support (3,375 Colors Supported for Color Panel Using Dithering Block)
    - RGB 12-, 16-, 18-, and 24-Bit Active Panel Interface Support (Replicated or Dithered Encoded Pixel Values)
    - Remote Frame Buffer (Embedded in the LCD Panel) Support Through the RFBI Module
    - Partial Refresh of the Remote Frame Buffer Through the RFBI Module
    - Partial Display
    - Multiple Cycles Output Format on 8-, 9-, 12-, and 16-Bit Interface (TDM)
  - Signal Processing
    - Overlay and Windowing Support for One Graphics Layer (RGB or CLUT) and Two Video Layers (YUV 4:2:2, RGB16, and RGB24)
    - RGB 24-Bit Support on the Display Interface, Optionally Dithered to RGB 18‑Bit Pixel Output Plus 6-Bit Frame Rate Control (Spatial and Temporal)
    - Transparency Color Key (Source and Destination)
    - Synchronized Buffer Update
    - Gamma Curve Support
    - Multiple-Buffer Support
    - Cropping Support
    - Color Phase Rotation
- Two 12-Bit SAR ADCs (ADC0, ADC1)
  - 867K Samples Per Second
  - Input Can Be Selected from Any of the Eight Analog Inputs Multiplexed Through an 8:1 Analog Switch
  - ADC0 Can Be Configured to Operate as a 4‑, 5-, or 8-Wire Resistive Touch Screen Controller (TSC)
- Up to Three 32-Bit eCAP Modules
  - Configurable as Three Capture Inputs or Three Auxiliary PWM Outputs
- Up to Six Enhanced eHRPWM Modules
  - Dedicated 16-Bit Time-Base Counter With Time and Frequency Controls
  - Configurable as Six Single-Ended, Six Dual-Edge Symmetric, or Three Dual-Edge Asymmetric Outputs
- Up to Three 32-Bit eQEP Modules
Device Identification
- Factory Programmable Electrical Fuse Farm (FuseFarm)
  - Production ID
  - Device Part Number (Unique JTAG ID)
  - Device Revision (Readable by Host ARM)
  - Security Keys (Avaliable Only on AM437xHS Devices)
  - Feature Identification
Debug Interface Support
- JTAG and cJTAG for ARM (Cortex-A9 and PRCM) and PRU-ICSS Debug
- Supports Real-Time Trace Pins (for Cortex-A9)
- 64-KB Embedded Trace Buffer (ETB)
- Supports Device Boundary Scan
- Supports IEEE 1500
DMA
- On-Chip Enhanced DMA Controller (EDMA) Has Three Third-Party Transfer Controllers (TPTCs) and One Third-Party Channel Controller (TPCC), Which Supports up to 64 Programmable Logical Channels and Eight QDMA Channels
- EDMA is Used for:
  - Transfers to and from On-Chip Memories
  - Transfers to and from External Storage (EMIF, GPMC, and Slave Peripherals)
InterProcessor Communication (IPC)
- Integrates Hardware-Based Mailbox for IPC and Spinlock for Process Synchronization Between the Cortex-A9, PRCM, and PRU-ICSS
Boot Modes
- Boot Mode is Selected Through Boot Configuration Pins Latched on the Rising Edge of the PWRONRSTn Reset Input Pin
Camera
- Dual Port 8- and 10-Bit BT656 Interface
- Dual Port 8- and 10-Bit Including External Syncs
- Single Port 12-Bit
- YUV422/RGB422 and BT656 Input Format
- RAW Format
- Pixel Clock Rate up to 75 MHz
Package
- 491-Pin BGA Package (17-mm × 17-mm) (ZDN Suffix), 0.65-mm Ball Pitch With Via Channel Array Technology to Enable Low-Cost Routing

The TI AM437x high-performance processors are based on the ARM Cortex-A9 core.

The processors are enhanced with 3D graphics acceleration for rich graphical user interfaces, as well as a coprocessor for deterministic, real-time processing including industrial communication protocols, such as EtherCAT, PROFIBUS, EnDat, and others. The devices support high-level operating systems (HLOS). Linux^® is available free of charge from TI. Other HLOSs are available from TI’s Design Network and ecosystem partners.

These devices offer an upgrade to systems based on lower performance ARM cores and provide updated peripherals, including memory options such as QSPI-NOR and LPDDR2.

The processors contain the subsystems shown in the Functional Block Diagram, and a brief description of each follows.

The processor subsystem is based on the ARM Cortex-A9 core, and the PowerVR SGX™ graphics accelerator subsystem provides 3D graphics acceleration to support display and advanced user interfaces.

The programmable real-time unit subsystem and industrial communication subsystem (PRU-ICSS) is separate from the ARM core and allows independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, EnDat, and others. The PRU-ICSS enables EnDat and another industrial communication protocol in parallel. Additionally, the programmable nature of the PRU-ICSS, along with their access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast real-time responses, specialized data handling operations, custom peripheral interfaces, and in off-loading tasks from the other processor cores of the SoC.

High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

One on-chip analog to digital converter (ADC0) can couple with the display subsystem to provide an integrated touch-screen solution. The other ADC (ADC1) can combine with the pulse width module to create a closed-loop motor control solution.

The RTC provides a clock reference on a separate power domain. The clock reference enables a battery-backed clock reference.

The camera interface offers configuration for a single- or dual-camera parallel port.

Cryptographic acceleration is available in all devices. All other supported security features, including support for Secure boot, debug security and support for Trusted execution environment is available on HS (High-Security) devices. For more information about HS devices, contact your TI sales representative.

The TI AM437x high-performance processors are based on the ARM Cortex-A9 core.

These devices offer an upgrade to systems based on lower performance ARM cores and provide updated peripherals, including memory options such as QSPI-NOR and LPDDR2.

The processors contain the subsystems shown in the Functional Block Diagram, and a brief description of each follows.

The processor subsystem is based on the ARM Cortex-A9 core, and the PowerVR SGX™ graphics accelerator subsystem provides 3D graphics acceleration to support display and advanced user interfaces.

The RTC provides a clock reference on a separate power domain. The clock reference enables a battery-backed clock reference.

The camera interface offers configuration for a single- or dual-camera parallel port.

filter

Buscar otro/a Procesadores basados en Arm

Descargar Ver vídeo con transcripción Video

Notas especiales

Complete una solicitud para obtener más información sobre los dispositivos de arranque seguro AM437xS, para comprar un módulo de evaluación (EVM) de alta seguridad y para obtener el software SEC-DEV.

Productos similares que pueden interesarle

open-in-new

Comparar alternativas

Funcionalidad similar a la del dispositivo comparado

AM625

ACTIVO

SoC de interacción persona-máquina con inteligencia artificial avanzada basada en Arm® Cortex®-A53 y Arm® MPU product based on single, dual or quad Cortex®-A53 with 3D GPU support

Documentación técnica

star

=Principal documentación para este producto seleccionada por TI

No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.

Ver todo 51

	Tipo	Título		Fecha
*	Data sheet	AM437x Sitara™ Processors datasheet (Rev. E)	PDF \| HTML	21 mar 2018
*	Errata	AM437x Sitara Processors Silicon Errata (Silicon Revisions 1.1, 1.2) (Rev. D)	PDF \| HTML	03 jun 2021
*	User guide	AM437x and AMIC120 ARM® Cortex™-A9 Processors Technical Reference Manual (Rev. I)		23 dic 2019
	Application note	Basic Ethernet Interface Debug With Linux	PDF \| HTML	11 oct 2024
	Application note	Industrial Communication Protocols Supported on Sitara™ Processors (Rev. E)	PDF \| HTML	10 may 2024
	Application note	Enabling Matter on Sitara MPU		17 ene 2024
	White paper	Securing Arm-Based Application Processors (Rev. E)		09 nov 2023
	White paper	Time Sensitive Networking for Industrial Automation (Rev. C)		31 jul 2023
	Application note	Intra Drive Communication Using 8b-10b Line Code With Programmable Real Time Uni	PDF \| HTML	24 may 2023
	Application note	High-Speed Interface Layout Guidelines (Rev. J)	PDF \| HTML	24 feb 2023
	Application note	PRU-ICSS Feature Comparison (Rev. G)	PDF \| HTML	11 oct 2022
	Technical article	Implementing an IO-Link master with deterministic timing	PDF \| HTML	07 jun 2022
	Application note	nfBGA Packaging (Rev. C)	PDF \| HTML	17 may 2021
	Application note	Ethernet PHY Configuration Using MDIO for Industrial Applications (Rev. A)		07 may 2021
	More literature	From Start to Finish: A Product Development Roadmap for Sitara™ Processors		16 dic 2020
	Application note	AM437x Schematic Checklist (Rev. A)		25 sep 2020
	White paper	EtherCAT® on Sitara™ Processors (Rev. I)		28 jul 2020
	White paper	EtherNet/IP on TI's Sitara AM335x Processors (Rev. D)		28 jul 2020
	User guide	Powering the AM335x, AM437x, and AM438x with TPS65218D0 (Rev. B)		27 feb 2020
	Application note	Programmable Logic Controllers — Security Threats and Solutions	PDF \| HTML	13 sep 2019
	Product overview	Sitara™ processors + WiLink™ 8 Wi-Fi® + Bluetooth® combo connectivity (Rev. A)		30 jul 2019
	Application note	Calculating Useful Lifetimes of Embedded Processors (Rev. B)	PDF \| HTML	07 may 2019
	Application note	AM43xx EMIF Tools (Rev. A)		18 abr 2019
	User guide	Powering AMIC110, AMIC120, AM335x, and AM437x with TPS65216		11 abr 2019
	Application brief	Flexible Timing Configuration with IO-Link Master Frame Handler		26 mar 2019
	Application note	PRU-ICSS Getting Started Guide on TI-RTOS (Rev. A)		18 ene 2019
	Application note	McASP Design Guide - Tips, Tricks, and Practical Examples		10 ene 2019
	Application note	PRU Read Latencies (Rev. A)		21 dic 2018
	Application note	PRU-ICSS Getting Starting Guide on Linux (Rev. A)		10 dic 2018
	White paper	Ensuring real-time predictability (Rev. B)		04 dic 2018
	Application note	PRU-ICSS EtherCAT Slave Troubleshooting Guide		07 nov 2018
	Application note	PRU-ICSS / PRU_ICSSG Migration Guide		05 nov 2018
	White paper	PROFINET on TI’s Sitara™ processors (Rev. D)		13 oct 2018
	User guide	How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS		24 sep 2018
	Application note	HSR/PRP Solutions on Sitara Processors for Grid Substation Communication		17 abr 2018
	User guide	PRU Assembly Instruction User Guide		16 feb 2018
	User guide	Discrete Power Solution for AM437x (Rev. A)		01 dic 2017
	Application note	Thermal Design Guide for DSP and Arm Application Processors (Rev. B)		14 ago 2017
	Application note	AM43xx Power Estimation Tool		07 ago 2017
	White paper	Cities grow smarter through innovative semiconductor technologies		07 jul 2017
	Product overview	AM43x Security Product Bulletin (Rev. A)		26 may 2017
	Application note	Sitara AM437x DDR-Less System How-To Instructions and Benchmarks (Rev. A)		21 feb 2017
	White paper	Enable security and amp up chip performance w/ hardware-accelerated cryptograpy (Rev. A)		11 ago 2016
	Application note	Plastic Ball Grid Array [PBGA] Application Note (Rev. B)		13 ago 2015
	Technical article	Selecting the right processor: WiLink 8 plug and play platforms	PDF \| HTML	26 jun 2015
	White paper	Highly integrated single-chip industrial drive to connect, control & communicate		29 abr 2015
	White paper	Mainline Linux™ ensures stability and innovation		27 mar 2014
	More literature	AM437x Sitara Processors Evaluation Module Quick Start Guide		20 mar 2014
	White paper	Scalable Solutions for HMI		21 nov 2013
	White paper	Linaro Speeds Development in TI Linux SDKs		27 ago 2013
	White paper	The Yocto Project:Changing the way embedded Linux software solutions are develop		14 mar 2013

Diseño y desarrollo

Soluciones de alimentación

Busque las soluciones de alimentación disponibles para el AM4379. TI ofrece soluciones de alimentación para sistemas en chip (SoC), procesadores, microcontroladores, sensores y matrices de compuertas programables de campo (FPGA), sean o no de TI.

Ver soluciones

Placa de evaluación

TMDSEVM437X — Módulo de evaluación AM437x

El módulo de evaluación (EVM) AM437x, TMDXEVM437X, permite a los desarrolladores comenzar inmediatamente a evaluar la familia de procesadores AM437x (AM4372, AM4376,AM4377, AM4378) y comenzar a crear aplicaciones y acelerar el desarrollo para aplicaciones interfaz hombre-máquina (HMI), industriales (...)

Guía del usuario: PDF

No disponible en TI.com

Placa de evaluación

TMDSIDK437X — Kit de desarrollo industrial (IDK) AM437x/AMIC120

El kit de desarrollo industrial (IDK) AM437x/AMIC120 es una plataforma de desarrollo de aplicaciones para evaluar las capacidades de comunicación y control industrial de los procesadores AM4379, AM4377 y AMIC120 de Sitara™ para aplicaciones industriales.

Los procesadores AM4379, AM4377 y AMIC120 (...)

Guía del usuario: PDF

No disponible en TI.com

Placa de evaluación

TMDXSK437X — Kit de inicio AM437x

El kit de inicio AM437x proporciona una plataforma estable y asequible para iniciar rápidamente la evaluación de los procesadores Sitara™ Arm® Cortex®-A9 AM437x (AM4376, AM4378) y acelerar el desarrollo para aplicaciones de interfaz hombre-máquina (HMI), industriales y de red. Se trata de una (...)

Guía del usuario: PDF

No disponible en TI.com

Placa de evaluación

TPS65218EVM-100 — Módulo de evaluación TPS65218

The TPS65218EVM is a fully assembled platform for evaluating the performance of the TPS65218 power management device.

Guía del usuario: PDF | HTML

No disponible en TI.com

Placa de evaluación

BYTES-3P-SITARASOMS — Bytes en el trabajo SOM de Sitara

bytes at work develops industrial computing products and services. They offer SOMs based on Sitara Arm® processors.

Learn more about bytes at work at http://www.bytesatwork.io/en.

Desde: bytes at work AG

View Options

Placa de evaluación

COMPU-3P-SITARASOMS — SOMs Compulab Sitara

CompuLab is a leading manufacturer of computer-on-module boards and miniature PC systems. CompuLab's products excel with an advanced set of features, outstanding level of integration, high reliability and affordable prices. Annual manufacturing rate of over 100,000 boards and systems positions (...)

Desde: CompuLab

View Options

Placa de evaluación

MISTR-3P-POM-AM437X — PoM y placas de aplicación Mistral Solutions AM437x

The Mistral Solutions AM437x PoM is a low-cost, small form factor, high performance, easy-to-use Product on Module (PoM) built around the TI Sitara AM437x processor. With extensive integration such as quad core PRU-ICSS, 3D acceleration core, dual camera, QSPI-NOR, up to 512KB on-chip memory, dual (...)

Desde: Mistral Solutions Pvt. Ltd

View Options

Placa de evaluación

MYIR-3P-SITARASOMS — SOM MYIR Sitara

MYIR offers a series of development kits and system-on-modules based on TI's AM335x Arm® Cortex®-A8 processors to meet customers' different requirements. MYIR also offers a compact single board computer Rico board based on TI's newest AM437x Arm Cortex-A9 solution. MYIR also offers custom (...)

Desde: MYIR Tech Limited

View Options

Placa de evaluación

SVT-3P-SITARA-SOMS — Sistema en módulo SVTronics para CPU AM437x

SOM437x is a system-on-module for TI's Sitara™ AM437x processors. It has the AM437x device, DDR3, PMIC (TPS65218), eMMC/NAND FLASH, Gigabit PHY on board and uses a 2.0mm DIP connector. Except for the DDR3 and power pins, all other CPU pins have been connected to the DIP connector. Standard (...)

Desde: SVTRONICS INC

Visitar el sitio del socio

Placa de evaluación

VAR-3P-SITARASOMS — SOM de Variscite Sitara

Variscite designs and produces a variety of system on modules and single board computers based TI's Sitara™, OMAP™ and DaVinci™ processors, covering a wide range of products, segments and markets. Variscite provides its customers with a complete development kit supporting Windows (...)

Desde: Variscite

View Options

Tarjeta secundaria

PRUCAPE — Cabo TI PRU

The TI PRU Cape is a BeagleBone Black add-on board that allows users get to know TI’s powerful Programmable Real-Time Unit (PRU) core and basic functionality. The PRU is a low-latency microcontroller subsystem integrated in the Sitara AM335x and AM437x family of devices. The PRU core is (...)

No disponible en TI.com

Sonda de depuración

TMDSEMU200-U — Sonda de depuración XDS200 USB

El XDS200 es una sonda de depuración (emulador) que se utiliza para depurar dispositivos integrados de TI. El XDS200 presenta un equilibrio de bajo costo con buen rendimiento en comparación con el XDS110 de bajo costo y el XDS560v2 de alto rendimiento. Es compatible con una amplia (...)

No disponible en TI.com

Sonda de depuración

TMDSEMU560V2STM-U — Sonda de depuración USB de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

No disponible en TI.com

Sonda de depuración

TMDSEMU560V2STM-UE — Sonda de depuración USB y ethernet de seguimiento del sistema XDS560v2

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

No disponible en TI.com

Kit de desarrollo de software (SDK)

PROCESSOR-SDK-LINUX-AM437X — Linux processor SDK for AM437x

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos. All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

Productos y hardware compatibles

Productos

Procesadores basados en Arm

AM4376 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS

AM4377 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT

AM4378 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, gráficos 3D

AM4379 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT, gráficos 3D

Desarrollo de hardware

Placa de evaluación

TMDSEVM437X — Módulo de evaluación AM437x

TMDSIDK437X — Kit de desarrollo industrial (IDK) AM437x/AMIC120

TMDXSK437X — Kit de inicio AM437x

Opciones de descarga

Kit de desarrollo de software (SDK)

PROCESSOR-SDK-LINUX-RT-AM437X — Linux-RT Processor SDK for AM437x

Productos y hardware compatibles

Productos

Procesadores basados en Arm

AM4376 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS

AM4377 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT

AM4378 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, gráficos 3D

AM4379 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT, gráficos 3D

Desarrollo de hardware

Placa de evaluación

TMDSEVM437X — Módulo de evaluación AM437x

TMDSIDK437X — Kit de desarrollo industrial (IDK) AM437x/AMIC120

Opciones de descarga

Kit de desarrollo de software (SDK)

PROCESSOR-SDK-RTOS-AM437X — TI-RTOS processor SDK for AM437x and AMIC120 (No design support from TI available. Refer to Overview- RTOS Highlights for details.)

Productos y hardware compatibles

Productos

Procesadores basados en Arm

AM4376 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS

AM4377 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT

AM4378 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, gráficos 3D

AM4379 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT, gráficos 3D

AMIC120 — Procesador Sitara; Arm Cortex-A9; más de 10 protocolos Ethernet, protocolos de codificador

Desarrollo de hardware

Placa de evaluación

TMDSEVM437X — Módulo de evaluación AM437x

TMDSIDK437X — Kit de desarrollo industrial (IDK) AM437x/AMIC120

TMDXSK437X — Kit de inicio AM437x

Opciones de descarga

Kit de desarrollo de software (SDK)

TIBLUETOOTHSTACK-SDK — Pila Bluetooth® de modo dual TI

TI’s dual-mode Bluetooth stack enables Bluetooth + Bluetooth Low Energy and is comprised of Single Mode and Dual Mode offerings implementing the Bluetooth 4.0/4.1/4.2 specification. The Bluetooth stack is fully Bluetooth Special Interest Group (SIG) qualified, certified and royalty-free, (...)

Guía del usuario: PDF | HTML

View Options

Controlador o biblioteca

PRU-ICSS-ETHERCAT-SLAVE — PRU-ICSS software for EtherCAT slave

The PRU-ICSS Protocols enables real-time industrial communications for TI Sitara processors. The PRU-ICSS protocols are built to use on top of Processor-SDK-RTOS, TI’s unified software development platform, and contain optimized PRU-ICSS firmware, a corresponding PRU-ICSS driver for the (...)

Productos y hardware compatibles

Productos

Procesadores basados en Arm

AM3357 — Procesador Sitara: Arm Cortex-A8, EtherCAT, PRU-ICSS, CAN

AM3359 — Procesador Sitara: Arm Cortex-A8, EtherCAT, 3D, PRU-ICSS, CAN

AM4377 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT

AM4379 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT, gráficos 3D

AM5716 — Procesador Sitara: Arm Cortex-A15 y DSP

AM5718 — Procesador Sitara: ARM Cortex-A15 y DSP, multimedia

AM5726 — Procesador Sitara: Arm Cortex-A15 doble y DSP doble

AM5728 — Procesador Sitara: Arm Cortex-A15 doble y DSP doble, multimedia

AM5746 — Procesador Sitara: arm Cortex-A15 doble y DSP doble, ECC en DDR y arranque seguro

AM5748 — Procesador Sitara: arm Cortex-A15 doble y DSP doble, multimedia, ECC en DDR y arranque seguro

AM5749 — Procesador Sitara: Arm Cortex-A15 doble y DSP doble, multimedia, ECC en DDR, arranque seguro, aprend

AM6548 — Procesador Arm® Cortex®-A53 cuádruple y Arm Cortex-R5F Sitara™ doble con gigabit PRU-ICSS y gráficos

AMIC110 — Procesador Sitara: m Cortex-A8, más de 10 protocolos Ethernet

AMIC120 — Procesador Sitara; Arm Cortex-A9; más de 10 protocolos Ethernet, protocolos de codificador

Desarrollo de hardware

Placa de evaluación

TMDSICE3359 — Motor de comunicaciones industriales AM3359

TMDSIDK437X — Kit de desarrollo industrial (IDK) AM437x/AMIC120

TMDSIDK574 — Kit de desarrollo industrial (IDK) AM574x

TMDX654IDKEVM — Kit de desarrollo industrial (IDK) AM65x

TMDXICE110 — Motor de comunicaciones industriales (ICE) AMIC110

TMDXIDK5718 — Kit de desarrollo industrial (IDK) AM571x

Opciones de descarga

Controlador o biblioteca

PRU-ICSS-ETHERNETIP-ADAPTER — PRU-ICSS software for EtherNetIP adapter

Productos y hardware compatibles

Productos

Procesadores basados en Arm

AM3356 — Procesador Sitara: Arm Cortex-A8, PRU-ICSS, CAN

AM3357 — Procesador Sitara: Arm Cortex-A8, EtherCAT, PRU-ICSS, CAN

AM3358 — Procesador Sitara: ARM Cortex-A8, gráficos 3D, PRU-ICSS, CAN

AM3359 — Procesador Sitara: Arm Cortex-A8, EtherCAT, 3D, PRU-ICSS, CAN

AM4376 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS

AM4377 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT

AM4378 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, gráficos 3D

AM4379 — Procesador Sitara: Arm Cortex-A9, PRU-ICSS, EtherCAT, gráficos 3D

AM5716 — Procesador Sitara: Arm Cortex-A15 y DSP

AM5718 — Procesador Sitara: ARM Cortex-A15 y DSP, multimedia

AM5726 — Procesador Sitara: Arm Cortex-A15 doble y DSP doble

AM5728 — Procesador Sitara: Arm Cortex-A15 doble y DSP doble, multimedia

AM5746 — Procesador Sitara: arm Cortex-A15 doble y DSP doble, ECC en DDR y arranque seguro

AM5748 — Procesador Sitara: arm Cortex-A15 doble y DSP doble, multimedia, ECC en DDR y arranque seguro

AM5749 — Procesador Sitara: Arm Cortex-A15 doble y DSP doble, multimedia, ECC en DDR, arranque seguro, aprend

AMIC110 — Procesador Sitara: m Cortex-A8, más de 10 protocolos Ethernet

Desarrollo de hardware

Placa de evaluación

TMDSICE3359 — Motor de comunicaciones industriales AM3359

TMDSIDK437X — Kit de desarrollo industrial (IDK) AM437x/AMIC120

TMDSIDK574 — Kit de desarrollo industrial (IDK) AM574x

TMDXICE110 — Motor de comunicaciones industriales (ICE) AMIC110

TMDXIDK5718 — Kit de desarrollo industrial (IDK) AM571x

Opciones de descarga

Controlador o biblioteca

PRU-ICSS-HSR-PRP-DAN — PRU-ICSS software for HSR/PRP