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Amplificadores operacionales (op amps)
Amplificadores operacionales de alta velocidad (GBW ≥ 50 MHz)

BUF802

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Ancho de banda amplio, 2,3 nV/√Hz, búfer JFET de impedancia de entrada alta

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BUF802

ACTIVO
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Detalles del producto

Architecture FET / CMOS Input, Fixed Gain/Buffer Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 9 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 13 GBW (typ) (MHz) 3100 BW at Acl (MHz) 3100 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 7000 Vn at flatband (typ) (nV√Hz) 2.3 Vn at 1 kHz (typ) (nV√Hz) 10 Iq per channel (typ) (mA) 34 Vos (offset voltage at 25°C) (max) (mV) 800 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Integrated Clamps Rating Catalog Operating temperature range (°C) -40 to 85 Input bias current (max) (pA) 25 Offset drift (typ) (µV/°C) 700 Iout (typ) (mA) 15 2nd harmonic (dBc) -55 3rd harmonic (dBc) -59 Frequency of harmonic distortion measurement (MHz) 1000
Architecture FET / CMOS Input, Fixed Gain/Buffer Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 9 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 13 GBW (typ) (MHz) 3100 BW at Acl (MHz) 3100 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 7000 Vn at flatband (typ) (nV√Hz) 2.3 Vn at 1 kHz (typ) (nV√Hz) 10 Iq per channel (typ) (mA) 34 Vos (offset voltage at 25°C) (max) (mV) 800 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Integrated Clamps Rating Catalog Operating temperature range (°C) -40 to 85 Input bias current (max) (pA) 25 Offset drift (typ) (µV/°C) 700 Iout (typ) (mA) 15 2nd harmonic (dBc) -55 3rd harmonic (dBc) -59 Frequency of harmonic distortion measurement (MHz) 1000
VQFN (RGT) 16 9 mm² 3 x 3
  • Large-signal bandwidth (1 VPP): 3.1 GHz
  • Slew rate: 7000 V/µs
  • Input voltage noise: 2.3 nV/√Hz
  • 1% settling time: 0.7 ns
  • Input-impedance: 50 GΩ || 2.4 pF
  • Capable of driving 50 Ω load
  • Adjustable quiescent current for power and performance trade-off
  • Integrated input and output clamp with fast overdrive recovery
  • Voltage supply: ±4.5 V to ±6.5 V
  • Large-signal bandwidth (1 VPP): 3.1 GHz
  • Slew rate: 7000 V/µs
  • Input voltage noise: 2.3 nV/√Hz
  • 1% settling time: 0.7 ns
  • Input-impedance: 50 GΩ || 2.4 pF
  • Capable of driving 50 Ω load
  • Adjustable quiescent current for power and performance trade-off
  • Integrated input and output clamp with fast overdrive recovery
  • Voltage supply: ±4.5 V to ±6.5 V

The BUF802 device is an open-loop, unity gain buffer with a JFET-input stage that offers low-noise, high-impedance buffering for data acquisition system (DAQ) front-ends. The BUF802 supports DC to 3.1 GHz of bandwidth while offering excellent distortion and noise performance across the frequency range.

The BUF802 may be used in a composite loop with a precision amplifier in applications where higher precision performance is required. The BUF802 uses an innovative architecture to simplify the design of high-precision, wide-bandwidth composite loops.

The BUF802 features an adjustable quiescent current pin, which enables designers to trade bandwidth and distortion for a lower quiescent current, thus making the part suitable across a wide-frequency range. The BUF802 has integrated input and output clamps to protect the device and its subsequent signal-chain from overdrive voltages.

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The BUF802 device is an open-loop, unity gain buffer with a JFET-input stage that offers low-noise, high-impedance buffering for data acquisition system (DAQ) front-ends. The BUF802 supports DC to 3.1 GHz of bandwidth while offering excellent distortion and noise performance across the frequency range.

The BUF802 may be used in a composite loop with a precision amplifier in applications where higher precision performance is required. The BUF802 uses an innovative architecture to simplify the design of high-precision, wide-bandwidth composite loops.

The BUF802 features an adjustable quiescent current pin, which enables designers to trade bandwidth and distortion for a lower quiescent current, thus making the part suitable across a wide-frequency range. The BUF802 has integrated input and output clamps to protect the device and its subsequent signal-chain from overdrive voltages.

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Documentación técnica

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* Data sheet BUF802 Wide-Bandwidth, 2.3 nV/√Hz, High-Input Impedance Buffer datasheet (Rev. C) PDF | HTML 18 mar 2022
Product overview Pairing High-Speed JFET Amplifiers With Hi-Z DAQ Systems PDF | HTML 08 abr 2024
Application note Choosing an Amplifier for Wide Bandwidth, High-Impedance, Data Acquisition AFEs PDF | HTML 02 mar 2023
Application brief How to Tune the S-Parameters of Your Analog Front-End Signal Chain PDF | HTML 25 feb 2022
EVM User's guide BUF802RGTEVM User's Guide (Rev. A) PDF | HTML 04 feb 2022
Technical article Achieving high-DC precision and wide large signal bandwidth with Hi-Z buffers PDF | HTML 18 ene 2022

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

BUF802RGTEVM — Módulo de evaluación BUF802 de alta velocidad, ancho de banda amplio, 2,3 nV/√Hz, búfer de entrada e

The BUF802RGTEVM is designed to easily demonstrate the functionality and versatility of the buffer. The EVM features two separate circuit configurations: a composite loop with a precision amplifier and a standalone BUF802 circuit. It can be used with split or single supplies, and includes SMA (...)
Guía del usuario: PDF | HTML
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Modelo de simulación

BUF802 PSpice model

SBOMC43.ZIP (187 KB) - PSpice Model
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Modelo de simulación

BUF802 TINA-TI Reference Circuit (Rev. D)

SBOMBQ8D.TSC (5895 KB) - TINA-TI Spice Model
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Herramienta de cálculo

ANALOG-ENGINEER-CALC — Calculadora para ingenieros analógicos

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
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Herramienta de cálculo

VOLT-DIVIDER-CALC — Voltage divider calculation tool

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PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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Diseños de referencia

TIDA-01022 — Diseño de referencia flexible AFE multicanal de 3.2 GSPS para DSO, radares y sistemas de prueba 5G i

This high speed multi-channel data capture reference design enables optimum system performance. System designers needs to consider critical design parameters like clock jitter and skew for high speed multi-channel clock generation, which affects overall system SNR, SFDR, channel to channel skew (...)
Design guide: PDF
Esquema: PDF
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VQFN (RGT) 16 Ultra Librarian
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