인터페이스 고속 시리얼라이저/디시리얼라이저 FPD-Link 시리얼라이저/디시리얼라이저

DS90UR916Q-Q1

활성

이미지 향상 기능을 지원하는 5-65MHz 24비트 컬러 FPD-Link II 디시리얼라이저

제품 상세 정보

Function Deserializer Color depth (bpp) 24 Input compatibility FPD-Link LVDS Output compatibility LVCMOS Features I2C Config Applications In-vehicle Infotainment (IVI) Signal conditioning Programmable Equalizer EMI reduction BIST Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
Function Deserializer Color depth (bpp) 24 Input compatibility FPD-Link LVDS Output compatibility LVCMOS Features I2C Config Applications In-vehicle Infotainment (IVI) Signal conditioning Programmable Equalizer EMI reduction BIST Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
WQFN (NKB) 60 81 mm² 9 x 9
  • 5 – 65 MHz PCLK support (140 Mbps – 1.82 Gbps)
  • RGB888 + VS, HS, DE Support
  • Image Enhancement - White Balance LUTs and Adaptive Hi-FRC Dithering
  • AC Coupled STP Interconnect Cable up to 10 Meters
  • @ Speed Link BIST Mode and Reporting Pin
  • I2C Compatible Serial Control Bus
  • Power Down Mode Minimizes Power Dissipation
  • 1.8V or 3.3V Compatible LVCMOS I/O Interface
  • Automotive Grade Product: AEC-Q100 Grade 2 Qualified
  • >8 kV HBM and ISO 10605 ESD Rating
  • FAST Random Ddata Lock; No Reference Clock Required
  • Adjustable Input Receiver Equalization
  • LOCK (Real Time Link Status) Reporting Pin
  • EMI Minimization on Output Parallel Bus (SSCG)
  • Output Slew Control (OS)
  • Backward Compatible Mode for Operation with Older Generation Devices

All trademarks are the property of their respective owners.

  • 5 – 65 MHz PCLK support (140 Mbps – 1.82 Gbps)
  • RGB888 + VS, HS, DE Support
  • Image Enhancement - White Balance LUTs and Adaptive Hi-FRC Dithering
  • AC Coupled STP Interconnect Cable up to 10 Meters
  • @ Speed Link BIST Mode and Reporting Pin
  • I2C Compatible Serial Control Bus
  • Power Down Mode Minimizes Power Dissipation
  • 1.8V or 3.3V Compatible LVCMOS I/O Interface
  • Automotive Grade Product: AEC-Q100 Grade 2 Qualified
  • >8 kV HBM and ISO 10605 ESD Rating
  • FAST Random Ddata Lock; No Reference Clock Required
  • Adjustable Input Receiver Equalization
  • LOCK (Real Time Link Status) Reporting Pin
  • EMI Minimization on Output Parallel Bus (SSCG)
  • Output Slew Control (OS)
  • Backward Compatible Mode for Operation with Older Generation Devices

All trademarks are the property of their respective owners.

The DS90UR916Q FPD-Link II deserializer operates with the DS90UR905Q FPD-Link II serializer to deliver 24-bit digital video data over a single differential pair. The DS90UR916Q provides features designed to enhance image quality at the display. The high speed serial bus scheme of FPD-Link II greatly eases system design by eliminating skew problems between clock and data, reduces the number of connector pins, reduces the interconnect size, weight, and cost, and overall eases PCB layout. In addition, internal DC balanced decoding is used to support AC-coupled interconnects.

The DS90UR916Q Des (deserializer) recovers the data (RGB) and control signals and extracts the clock from the serial stream. The Des locks to the incoming serial data stream without the use of a training sequence or special SYNC patterns, and does not require a reference clock. A link status (LOCK) output signal is provided. The DS90UR916Q is ideally suited for 24-bit color applications. White balance lookup tables and adaptive Hi-FRC dithering provide the user a cost-effective means to enhance display image quality.

Serial transmission is optimized with user selectable receiver equalization. EMI is minimized by the use of low voltage differential signaling, output slew control, and the Des may be configured to generate Spread Spectrum Clock and Data on its parallel outputs.

The DS90UR916Qis offered in a 60-pin WQFN package. It is specified over the automotive AEC-Q100 grade 2 temperature range of -40°C to +105°C.

The DS90UR916Q FPD-Link II deserializer operates with the DS90UR905Q FPD-Link II serializer to deliver 24-bit digital video data over a single differential pair. The DS90UR916Q provides features designed to enhance image quality at the display. The high speed serial bus scheme of FPD-Link II greatly eases system design by eliminating skew problems between clock and data, reduces the number of connector pins, reduces the interconnect size, weight, and cost, and overall eases PCB layout. In addition, internal DC balanced decoding is used to support AC-coupled interconnects.

The DS90UR916Q Des (deserializer) recovers the data (RGB) and control signals and extracts the clock from the serial stream. The Des locks to the incoming serial data stream without the use of a training sequence or special SYNC patterns, and does not require a reference clock. A link status (LOCK) output signal is provided. The DS90UR916Q is ideally suited for 24-bit color applications. White balance lookup tables and adaptive Hi-FRC dithering provide the user a cost-effective means to enhance display image quality.

Serial transmission is optimized with user selectable receiver equalization. EMI is minimized by the use of low voltage differential signaling, output slew control, and the Des may be configured to generate Spread Spectrum Clock and Data on its parallel outputs.

The DS90UR916Qis offered in a 60-pin WQFN package. It is specified over the automotive AEC-Q100 grade 2 temperature range of -40°C to +105°C.

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기술 자료

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2개 모두 보기
유형 직함 날짜
* Data sheet DS90UR916Q 5 - 65 MHz 24-bit Color FPD-Link II Deserializer with Image Enhanceme datasheet (Rev. E) 2013/04/18
User guide SERDESUR-916ROS User’s Guide 2012/09/21

설계 및 개발

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시뮬레이션 모델

DS90UR916Q IBIS Model

SNOM333.ZIP (146 KB) - IBIS Model
시뮬레이션 툴

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사용 설명서: PDF
패키지 CAD 기호, 풋프린트 및 3D 모델
WQFN (NKB) 60 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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