인터페이스 이더넷 IC 이더넷 리타이머, 리드라이버 및 멀티플렉서 버퍼

SN65LVCP1412

구형

14.2Gbps 듀얼 채널, 듀얼 모드 선형 이퀄라이저

제품 상세 정보

Type Redriver Number of channels 2 Input compatibility CML Speed (max) (Gbpp) 14.2 Protocols 10G-KR, 10G-SR/LR, CPRI, Fibre Channel, OBSAI, SAS, SATA Operating temperature range (°C) -40 to 85
Type Redriver Number of channels 2 Input compatibility CML Speed (max) (Gbpp) 14.2 Protocols 10G-KR, 10G-SR/LR, CPRI, Fibre Channel, OBSAI, SAS, SATA Operating temperature range (°C) -40 to 85
  • Dual Channel, Uni-Directional, Multi-Rate, Dual-Mode Linear Equalizer with Operation
    up to 14.2Gbps Serial Data Rate for Backplane and Cable Interconnects
  • Linear Equalization Increases Link Margin for Systems
    Implementing Decision Feedback Equalizers (DFE)
  • 18dB Analog Equalization at 7.1GHz with 1dB Step Control for Backplane Mode or Cable Mode
  • Output Linear Dynamic Range: 1200mV
  • Bandwidth: >20GHz – Typical
  • Better than 15dB Return Loss at 7.1GHz
  • Supports Out-of-Band (OOB) Signaling
  • Low Power: Typically 75mW per Channel at 2.5V VCC
  • 24-Terminal QFN (Quad Flatpack, No-Lead) 4mm × 5mm × 0.75mm; 0.5mm Terminal Pitch
  • Excellent Impedance Matching to 100Ω Differential PCB Transmission Lines
  • GPIO or I2C Control
  • 2.5V and 3.3V±5% Single Power Supply
  • 2kV ESD (HBM)
  • Flow-Through Pin-Out Provides Ease of Routing
  • Small Package Size Saves Board Space
  • Dual Channel, Uni-Directional, Multi-Rate, Dual-Mode Linear Equalizer with Operation
    up to 14.2Gbps Serial Data Rate for Backplane and Cable Interconnects
  • Linear Equalization Increases Link Margin for Systems
    Implementing Decision Feedback Equalizers (DFE)
  • 18dB Analog Equalization at 7.1GHz with 1dB Step Control for Backplane Mode or Cable Mode
  • Output Linear Dynamic Range: 1200mV
  • Bandwidth: >20GHz – Typical
  • Better than 15dB Return Loss at 7.1GHz
  • Supports Out-of-Band (OOB) Signaling
  • Low Power: Typically 75mW per Channel at 2.5V VCC
  • 24-Terminal QFN (Quad Flatpack, No-Lead) 4mm × 5mm × 0.75mm; 0.5mm Terminal Pitch
  • Excellent Impedance Matching to 100Ω Differential PCB Transmission Lines
  • GPIO or I2C Control
  • 2.5V and 3.3V±5% Single Power Supply
  • 2kV ESD (HBM)
  • Flow-Through Pin-Out Provides Ease of Routing
  • Small Package Size Saves Board Space

The SN65LVCP1412 is an asynchronous, protocol-agnostic, low latency, two-channel linear equalizer optimized for use up to 14.2Gbps and compensates for losses in backplane or active cable applications. The architecture of SN65LVCP1412 is designed to work with an ASIC or a FPGA with digital equalization employing Decision Feedback Equalizers (DFE). SN65LVCP1412 linear equalizer preserves the shape of the transmitted signal ensuring optimum DFE performance. SN65LVCP1412 provides a low power solution while at the same time extending the effectiveness of DFE.

SN65LVCP1412 is configurable via I2C or GPIO interface. Using the I2C interface of the SN65LVCP1412 enables the user to control independently the Equalization, Path Gain, and Output Dynamic Range for each individual channel. In GPIO mode, Equalization, Path Gain, and Output Dynamic Range can be set for all channels using the GPIO Input pins.

SN65LVCP1412 outputs can be disabled independently via I2C.

The SN65LVCP1412 operates from a single 2.5V or 3.3V power supply.

The package for the SN65LVCP1412 is a 24 pin 4mm x 5mm x 0.75mm QFN (Quad Flatpack, No-lead) lead-free package with 0.5mm pitch, and characterized for operation from –40°C to 85°C.

The SN65LVCP1412 is an asynchronous, protocol-agnostic, low latency, two-channel linear equalizer optimized for use up to 14.2Gbps and compensates for losses in backplane or active cable applications. The architecture of SN65LVCP1412 is designed to work with an ASIC or a FPGA with digital equalization employing Decision Feedback Equalizers (DFE). SN65LVCP1412 linear equalizer preserves the shape of the transmitted signal ensuring optimum DFE performance. SN65LVCP1412 provides a low power solution while at the same time extending the effectiveness of DFE.

SN65LVCP1412 is configurable via I2C or GPIO interface. Using the I2C interface of the SN65LVCP1412 enables the user to control independently the Equalization, Path Gain, and Output Dynamic Range for each individual channel. In GPIO mode, Equalization, Path Gain, and Output Dynamic Range can be set for all channels using the GPIO Input pins.

SN65LVCP1412 outputs can be disabled independently via I2C.

The SN65LVCP1412 operates from a single 2.5V or 3.3V power supply.

The package for the SN65LVCP1412 is a 24 pin 4mm x 5mm x 0.75mm QFN (Quad Flatpack, No-lead) lead-free package with 0.5mm pitch, and characterized for operation from –40°C to 85°C.

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유형 직함 날짜
* Data sheet 14.2-GBPS DUAL CHANNEL, DUAL MODE LINEAR EQUALIZER datasheet 2012/09/19

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치