인터페이스 I2C & I3C ICs I2C & I3C level shifters, buffers & hubs

TCA9406

활성

내부 풀업 저항을 지원하는 2비트 양방향 1MHz I2C/SMBus 전압 레벨 트랜스레이터

제품 상세 정보

Features Enable pin Protocols I2C Frequency (max) (MHz) 1 VCCA (min) (V) 1.65 VCCA (max) (V) 3.6 VCCB (min) (V) 2.3 VCCB (max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (°C) -40 to 85
Features Enable pin Protocols I2C Frequency (max) (MHz) 1 VCCA (min) (V) 1.65 VCCA (max) (V) 3.6 VCCB (min) (V) 2.3 VCCB (max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YZP) 8 2.8125 mm² 2.25 x 1.25 SSOP (DCT) 8 11.8 mm² 2.95 x 4 VSSOP (DCU) 8 6.2 mm² 2 x 3.1
  • 2-Bit Bidirectional Translator for SDA and SCL Lines in I2C Applications
  • Provides Bidirectional Voltage Translation With No Direction Pin
  • High-Impedance Output SCL_A, SDA_A, SCL_B, SDA_B Pins When OE = Low or VCC = 0 V
  • Internal 10-kΩ Pullup Resistor on All SDA and SCL Pins
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA  ≤ VCCB)
  • VCC Isolation Feature: If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • No Power-Supply Sequencing Required: Either VCCA or VCCB Can Be Ramped First
  • Low Ioff of 2 µA When Either VCCA or VCCB = 0 V
  • OE Input Can Be Tied Directly to VCCA Or Controlled By GPIO
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2500-V Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
    • B Port
      • 8-kV Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
  • 2-Bit Bidirectional Translator for SDA and SCL Lines in I2C Applications
  • Provides Bidirectional Voltage Translation With No Direction Pin
  • High-Impedance Output SCL_A, SDA_A, SCL_B, SDA_B Pins When OE = Low or VCC = 0 V
  • Internal 10-kΩ Pullup Resistor on All SDA and SCL Pins
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA  ≤ VCCB)
  • VCC Isolation Feature: If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • No Power-Supply Sequencing Required: Either VCCA or VCCB Can Be Ramped First
  • Low Ioff of 2 µA When Either VCCA or VCCB = 0 V
  • OE Input Can Be Tied Directly to VCCA Or Controlled By GPIO
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2500-V Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
    • B Port
      • 8-kV Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)

The TCA9406 is a 2-bit bidirectional I2C and SMBus voltage-level translator with an output enable (OE) input. It is operational from 1.65 V to 3.6 V on the A-side, referenced toVCCA, and from 2.3 V to 5.5 V on the B-side, referenced to VCCB. This allows the device to interface between lower and higher logic signal levels at any of the typical 1.8-V, 2.5-V, 3.3-V, and
5-V supply rails.

The OE input pin is referenced to VCCA, can be tied directly to VCCA, but it is also 5.5-V tolerant. The OE pin can also be controlled and set to a logic low to place all the SCL and SDA pins in a high-impedance state, which significantly reduces the quiescent current consumption.

Under normal I2C and SMBus operation or other open-drain configurations, the TCA9406 can support up to 2 Mbps; therefore, it is compatible with standard I2C speeds where the frequency of SCL is 100 kHz (Standard-mode), 400 kHz (Fast-mode), or 1 MHz (Fast-mode Plus). The device can also be used as a general purpose level translator, and when the A- and B-side ports are both driven with push-pull devices the TCA9406 can support up to 24 Mbps.

The TCA9406 features internal 10-kΩ pullup resistors on SCL_A, SDA_A, SCL_B, and SDA_B. Additional external pullup resistors can be added to the bus to reduce the total pullup resistance and speed up rising edges.

The TCA9406 is a 2-bit bidirectional I2C and SMBus voltage-level translator with an output enable (OE) input. It is operational from 1.65 V to 3.6 V on the A-side, referenced toVCCA, and from 2.3 V to 5.5 V on the B-side, referenced to VCCB. This allows the device to interface between lower and higher logic signal levels at any of the typical 1.8-V, 2.5-V, 3.3-V, and
5-V supply rails.

The OE input pin is referenced to VCCA, can be tied directly to VCCA, but it is also 5.5-V tolerant. The OE pin can also be controlled and set to a logic low to place all the SCL and SDA pins in a high-impedance state, which significantly reduces the quiescent current consumption.

Under normal I2C and SMBus operation or other open-drain configurations, the TCA9406 can support up to 2 Mbps; therefore, it is compatible with standard I2C speeds where the frequency of SCL is 100 kHz (Standard-mode), 400 kHz (Fast-mode), or 1 MHz (Fast-mode Plus). The device can also be used as a general purpose level translator, and when the A- and B-side ports are both driven with push-pull devices the TCA9406 can support up to 24 Mbps.

The TCA9406 features internal 10-kΩ pullup resistors on SCL_A, SDA_A, SCL_B, and SDA_B. Additional external pullup resistors can be added to the bus to reduce the total pullup resistance and speed up rising edges.

다운로드 스크립트와 함께 비디오 보기 동영상

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
6개 모두 보기
유형 직함 날짜
* Data sheet TCA9406 2-Bit Bidirectional 1-MHz, I2C Bus and SMBus Voltage-Level Translator With 8-kV HBM ESD datasheet (Rev. G) PDF | HTML 2018/11/29
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024/07/03
EVM User's guide TCA9406 I2C Translator Evaluation Module 2018/10/26
Application note Understanding the I2C Bus PDF | HTML 2015/06/30
Application note Maximum Clock Frequency of I2C Bus Using Repeaters 2015/05/15
Application note I2C Bus Pull-Up Resistor Calculation PDF | HTML 2015/02/13

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

DS90UB9702-Q1EVM — DS90UB9702-Q1 평가 모듈

DS90UB9702-Q1EVM 평가 모듈(EVM)은 DS90UB9702-Q1 FPD-Link IV 디시리얼라이저 허브를 평가하기 위한 기능 보드 설계입니다. DS90UB9702-Q1은 FPD-Link III 및 FPD-Link IV 시리얼라이저를 사용하여 최대 4개의 독립 비디오 소스에서 데이터를 받을 수 있는 다목적 디시리얼라이저입니다. DS90UB971-Q1 시리얼라이저와 페어링하면 DS90UB9702-Q1은 높은 색 깊이로 8MP+ 이미저로부터 데이터를 수신할 수 있습니다. 이 장치에는 독립형 MIPI DPHY CSI-2 (...)
평가 보드

TCA9406EVM — 상승 시간 가속기가 포함된 TCA9406 I2C 트랜스레이터 평가 모듈

This EVM can be used to evaluate the TCA9406 product in the DCU package. The I2C buses are easily accessed via SDA_A, SCL_A, SDA_B, and SCL_B test points, and symmetrically laid out for optimal performance. All IC signals are available through test point connections.
사용 설명서: PDF
TI.com에서 구매 불가
설계 툴

I2C-DESIGNER — I2C 디자이너 툴

Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard (...)
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
시뮬레이션 툴

TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
레퍼런스 디자인

TIDA-01572 — 디지털 입력, 클래스 D, IV 감지 오디오 증폭기의 스테레오 평가 모듈 레퍼런스 디자인

This reference design provides a high-performance stereo audio subsystem for use in PC applications. It operates off a single supply, ranging from 4.5 V to 16 V, and features the TAS2770, a digital-input Class-D audio amplifier that provides excellent noise and distortion performance and is (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00609 — 자동 부팅 오디오 시스템

The purpose of this reference design is to provide hardware and software tools that can be used as reference for audio systems. The new revision of the PurePath™ Console Motherboard (Rev F) adds stand-alone self-booting capabilities to allow making compelling demos with any evaluation module (...)
Test report: PDF
회로도: PDF
패키지 CAD 기호, 풋프린트 및 3D 모델
DSBGA (YZP) 8 Ultra Librarian
SSOP (DCT) 8 Ultra Librarian
VSSOP (DCU) 8 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상