TPS53317A
- TI-Proprietary Integrated MOSFET and Packaging Technology
- Supports DDR Memory Termination with up to 6-A Continuous Output Source or Sink Current
- External Tracking
- Minimum External Components Count
- to 6-V Conversion Voltage
- D-CAP+ Mode Architecture
- Supports All MLCC Output Capacitors and SP/POSCAP
- Selectable SKIP Mode or Forced CCM
- Optimized Efficiency at Light and Heavy Loads
- Selectable 600-kHz or 1-MHz Switching Frequency
- Selectable Overcurrent Limit (OCL)
- Overvoltage, Over-Temperature and Hiccup Undervoltage Protection
- Adjustable Output Voltage from to 2 V
- 3.5 mm × 4 mm, 20-Pin, VQFN Package
The device is a FET-integrated synchronous buck regulator designed mainly for DDR termination. It can provide a regulated output at ½ VDDQ with bothsink and source capability. The device employs D-CAP+ mode operation that provides ease of use, low external component count and fast transient response. The device canalso be used for other point-of-load (POL) regulation applications requiring up to 6 A. Inaddition, the device supports full, 6-A, output sinking current capability with tight voltageregulation.
The device features two switching frequency settings (600 kHz and 1 MHz), integrateddroop support, external tracking capability, pre-bias startup, output soft discharge, integratedbootstrap switch, power good function, V5IN pin UVLO protection, and supports both ceramic andSP/POSCAP capacitors. It supports input voltages up to 6.0 V, and output voltages adjustable from to 2.0 V.
The device is available in the 3.5 mm × 4 mm, 20-pin, VQFNpackage (Green RoHs compliant and Pb free) with TI proprietary Integrated MOSFET and packaging technology and is specified from –40°C to 85°C.
For all available packages, see the orderable addendum at the end of the data sheet.기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | TPS53317A 6-A Output, D-CAP+ Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination datasheet (Rev. A) | PDF | HTML | 2015/11/10 |
White paper | Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) | PDF | HTML | 2024/04/30 | |
Application note | Point-of-Load Solutions for Data Center App Implementing VR13.HC Vccin Spec (Rev. A) | PDF | HTML | 2020/01/08 | |
Technical article | Voltage regulator features – inside the black box | PDF | HTML | 2016/05/31 | |
Technical article | Simplifying loop compensation and poles and zeros calculations | PDF | HTML | 2016/03/18 | |
EVM User's guide | Using the TPS53317AEVM-726 | 2015/11/18 |
설계 및 개발
데스크톱에서 설계 및 개발 섹션을 확인하세요.주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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