UCC27512
- Low-Cost Gate-Driver Device Offering Superior
Replacement of NPN and PNP Discrete Solutions - 4-A Peak Source and 8-A Peak Sink Asymmetrical
Drive - Strong Sink Current Offers Enhanced Immunity
Against Miller Turnon - Split Output Configuration (Allows Easy and
Independent Adjustment of Turnon and Turnoff
Speeds) in the UCC27511 Saves 1 Diode - Fast Propagation Delays (13-ns Typical)
- Fast Rise and Fall Times (9-ns and 7-ns Typical)
- 4.5-V to 18-V Single Supply Range
- Outputs Held Low During VDD UVLO (Ensures
Glitch-Free Operation at Power Up and Power
Down) - TTL and CMOS Compatible Input-Logic Threshold
(Independent of Supply Voltage) - Hysteretic-Logic Thresholds for High-Noise
Immunity - Dual-Input Design (Choice of an Inverting
(IN– Pin) or Noninverting (IN+ Pin)
Driver Configuration)- Unused Input Pin can be Used for Enable or
Disable Function
- Unused Input Pin can be Used for Enable or
- Output Held Low When Input Pins Are Floating
- Input Pin Absolute Maximum Voltage Levels Not
Restricted by VDD Pin Bias Supply Voltage - Operating Temperature Range of –40°C
to 140°C - 6-Pin DBV (SOT-23) and 6-Pin DRS (3-mm ×
3-mm WSON With Exposed Thermal Pad) Package
Options
The UCC27511 and UCC27512 single-channel, high-speed, low-side gate-driver device can effectively drive MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC27511 and UCC27512 are capable of sourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay, typically 13 ns.
UCC27511 features a dual-input design which offers flexibility of implementing both inverting (IN– pin) and noninverting (IN+ pin) configuration with the same device. Either IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.
The input pin threshold of the UCC27511 device is based on TTL and CMOS-compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.
The UCC27511 and UCC27512 provides 4-A source, 8-A sink (asymmetrical drive) peak-drive current capability. Strong sink capability in asymmetrical drive boosts immunity against parasitic, Miller turnon effect. The UCC27511 device also features a unique split output configuration where the gate-drive current is sourced through OUTH pin and sunk through OUTL pin. This unique pin arrangement allows the user to apply independent turnon and turnoff resistors to the OUTH and OUTL pins respectively and easily control the switching slew rates.
UCC27511 and UCC27512 are designed to operate over a wide VDD range of 4.5 to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power-semiconductor devices.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | UCC2751x Single-Channel, High-Speed, Low-Side Gate Driver (With 4-A Peak Source and 8-A Peak Sink) datasheet (Rev. F) | PDF | HTML | 2013/12/09 |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020/02/28 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020/02/28 | ||
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 2018/10/29 | ||
| Application brief | Enable Function with Unused Differential Input | 2018/07/11 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018/06/25 | ||
| Application brief | Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole | 2018/03/16 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
PMP22089 — GaN 기술을 지원하는 하프 브리지 부하 지점 컨버터 레퍼런스 설계
PMP4497 — LMG5200 48V~1V/40A 단일 스테이지 컨버터 레퍼런스 디자인
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| WSON (DRS) | 6 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.