UCC3817
- Controls Boost Preregulator to Near-Unity Power Factor
- Limits Line Distortion
- World Wide Line Operation
- Over-Voltage Protection
- Accurate Power Limiting
- Average Current Mode Control
- Improved Noise Immunity
- Improved Feed-Forward Line Regulation
- Leading Edge Modulation
- 150-µA Typical Start-Up Current
- Low-Power BiCMOS Operation
- Up to 18-V Operation
- Frequency Range 6 kHz to 220 kHz
The UCCx817 and UCCx818 family provides all the functions necessary for active power factor-corrected preregulators. The controller achieves near-unity power factor by shaping the AC input line current waveform to correspond to that of the AC input line voltage. Average current mode control maintains stable, low distortion sinusoidal line current.
Designed in Texas Instrument’s BiCMOS process, the UCCx817 and UCCx818 offers new features such as lower start-up current, lower power dissipation, overvoltage protection, a shunt UVLO detect circuitry, a leading-edge modulation technique to reduce ripple current in the bulk capacitor, and an improved, low-offset (±2-mV) current amplifier to reduce distortion at light load conditions.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | UCC2817, UCC2818, UCC3817 and UCC3818 BiCMOS Power Factor Pregulator datasheet (Rev. K) | PDF | HTML | 2016/10/01 |
User guide | UCC3817 BiCMOS Power Factor Preregulator Evaluation Board (Rev. D) | 2014/11/13 | ||
Application note | Avoiding Audible Noise at Light Loads When Using Leading Edge Triggered PFC Con (Rev. C) | 2011/04/13 | ||
Application note | Startup Current transient of the Leading Edge Triggered PFC Controllers | 2004/06/30 | ||
Application note | UCC3817 Current Sense Transformer Evaluation | 2004/02/13 | ||
Application note | PFC Family Differences UCC3817A/18A/19A and UCC3817/18/19 | 2003/08/18 | ||
Application note | AC Requirements for Power Factor Correction Circuits | 2002/03/28 | ||
Application note | Accurate PWM Duty Cycle Clamp | 2002/01/25 | ||
Application note | DN-66 UC3854A/B and UC3855A/B Provide Power Limiting with Sinusoidal Input (Rev. A) | 2001/11/06 | ||
Application note | Synchronizing a PFC Controller from a Down Stream Controller Gate Drive | 2000/11/03 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
PDIP (N) | 16 | Ultra Librarian |
SOIC (D) | 16 | Ultra Librarian |
SOIC (DW) | 16 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치