DLPC6540
- DLPC6540 controller using the DLP471TP digital micromirror device (DMD) supports
- Up to 4K UHD at 60 Hz
- Up to 1080p at 240 Hz (2D) and 120 Hz (3D)
- Provides single V-by-One HS video input port with one, two, four, or eight lanes
- Up to 600-MHz pixel clock support
- Up to 3.0-Gbps input transmission rate
- Input formats supported
- RGB, YCbCr, and ICtCp
- 4:4:4, 4:2:2, 4:2:0
- Internal Arm CortexR4F processor with FPU
- 88 configurable GPIOs
- Programmable PWM generator
- Programmable capture and delay timers
- USB 2.0 high-speed OTG controller
- SPI primary/secondary controllers
- I2C primary/secondary controllers
- UART and interrupt controllers
- Warping engine
- Improved 1D, 2D, and 3D keystone correction
- Optical distortion correction (radial and lateral color distortion; for example,for short throw)
- Warping (multipoint manual warp and full warp map access 62× 32 points)
- Blending (manual blending and full blending map access 63× 32 points)
- Additional image processing
- DynamicBlack
- TI DLP BrilliantColor™ Technology
- HDR10 (PQ and HLG) support
- Frame rate conversion
- Color coordinate adjustment
- White color temperature adjustment
- Programmable degamma
- Spatial-temporal multiplexing
- Integrated support for 3-D display
- Splash screen display and capture
- Integrated 2G-bit frame memory eliminates need for external high-speed memory
- External memory support
- Parallel flash for µP and PWM sequences
- Secondary flash for splash capture, warping
- System control
- DMD power and reset driver control
- DMD horizontal and vertical image flip
- JTAG boundary scan test support
The DLPC6540 is a digital display controller for the TI DLP Products 4K UHD display chipset. The DLPC6540 display controller, together with the DLP471TPdigital micromirror device (DMD) and the DLPA3005power management IC (PMIC) comprise the chipset. This solution is fit for display systems that require high resolution and high brightness in a small form factor. To ensure reliable operation, the DLPC6540 display controller must always be used with the DLP471TP DMD and the DLPA3005 power management integrated circuit per application.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | DLPC6540 High Resolution Controller datasheet (Rev. C) | PDF | HTML | 2022年 11月 7日 |
Technical article | 如何解決超短焦雷射電視設計難題 (Rev. A) | PDF | HTML | 2024年 7月 1日 | |
Technical article | 透過 4K UHD 看見更多細節 (Rev. A) | PDF | HTML | 2024年 6月 13日 | |
Application note | 開始使用 TI DLP® 顯示技術 (Rev. H) | PDF | HTML | 2024年 5月 3日 | |
Product overview | TI DLP 4K Ultra High Definition (UHD) Display Chipset (Rev. A) | PDF | HTML | 2023年 8月 17日 | |
User guide | DLPC6540 Programmer's Guide (Rev. B) | PDF | HTML | 2022年 5月 23日 | |
User guide | DLP® EVM GUI Tool User's Guide | PDF | HTML | 2021年 10月 28日 | |
EVM User's guide | DLP® LightCrafter™ Display 471TP EVM User's Guide | PDF | HTML | 2021年 3月 3日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
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DMD-DIFFRACTION-EFFICIENCY-CALCULATOR — Calculator helps model DMD diffraction patterns and diffraction efficiency
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PBGA (ZDC) | 676 | Ultra Librarian |
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