DS110RT410
- Each Channel Independently Locks to Data Rates
from 8.5 to 11.3 Gbps and Sub-rates - Sub-rates of Divide by 2, 4, or 8
- Fast-Lock Operation Based on Protocol-Select
Mode - Low Latency (≈ 300 ps)
- Adaptive Equalization up to 34-dB Boost at 5 GHz
- Adjustable Transmit VOD: 600 to 1300 mVp-p
- Adjustable Transmit De-emphasis to –12 dB
- Typical Power Dissipation (EQ+CDR+DE):
150 mW/Channel - Programmable Output Polarity Inversion
- Input Signal Detection, CDR Lock Detection and
Indicator - On-Chip Eye Monitor (EOM), PRBS Generator
- Single 2.5-V ±5% Power Supply
- SMBus and EEPROM Configuration Modes
- Operating Temperature Range of –40 to 85°C
- WQFN 48-Pin 7-mm × 7-mm Package
- Easy Pin Compatible Upgrade Between Repeater
and Retimers- DS100RT410 (EQ+CDR+DE): 10.3125 Gbps
- DS100DF410 (EQ+DFE+CDR+DE):
10.3125 Gbps - DS110RT410 (EQ+CDR+DE): 8.5 to
11.3 Gbps - DS110DF410 (EQ+DFE+CDR+DE): 8.5 to
11.3 Gbps - DS125RT410 (EQ+CDR+DE): 9.8 to
12.5 Gbps - DS125DF410 (EQ+DFE+CDR+DE):
9.8 to 12.5 Gbps - DS100BR410 (EQ+DE): Up to
10.3125 Gbps
The DS110RT410 is a four-channel retimer with integrated signal conditioning. The device includes a fully adaptive continuous-time linear equalizer (CTLE), clock and data recovery (CDR), and a transmit de-emphasis (DE) driver to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1 × 10–15. For channels with a high amount of crosstalk, the DS110DF410 should be used because it has self-calibrating 5-tap decision-feedback equalizer (DFE).
Each channel can independently lock to data rates from 8.5 to 11.3 Gbps, and associated sub-rates (divide by 2, 4, and 8) to support a variety of communication protocols. A 25-MHz crystal oscillator clock is used to speed up the CDR lock process. This clock is not used for training the PLL and does not need to be synchronous with the serial data.
The programmable settings can be applied using the SMBus (I2C) interface, or they can be loaded through an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS110RT410 Low-Power Multi-Rate Quad Channel Retimer datasheet (Rev. A) | PDF | HTML | 2015年 10月 27日 |
| EVM User's guide | DS100DF410EVK, DS110DF410EVK, DS125DF410EVM User's Guide (Rev. C) | 2016年 6月 22日 | ||
| Application note | Understanding EEPROM Programming for 10G to 12.5G Retimers | 2016年 1月 13日 | ||
| Application note | Selecting TI SigCon Devices for SFF-8431 SFP+ Applications | 2014年 5月 6日 |
設計與開發
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DS110DF410EVM — DS110DF410EVM：具有適應性 EQ、CDR 和 DFE 的 8.5 至 11.3 Gbps 四通道重定時器評估模組
The DS110DF410EVM evaluation board allows the user to examine the advanced signal conditioning capabilities of the DS110DF410 and DS110RT410 devices using SMAs. The board is controlled by a PC using a USB port and the SigCon Architect GUI.
In order to use the SigCon Architect GUI to control the (...)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RHS) | 48 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點