DS160PR1601
- 16-lane linear redriver supporting PCIe 4.0, and UPI 2.0
- Supports data rates up to 16-Gbps
- P2P with Intel retimer common footprint
- 64 integrated AC coupling capacitors on TX pins inside package saving board space
- CTLE boosts of 16 dB at 8 GHz
- Analog EyeScan to aid redriver tuning, debug and remote monitoring
- Ultra-low latency of 130 ps
- Low additive random jitter of 100 fs for PRBS data
- Excellent RX/TX return loss of −13 dB at 8 GHz
- Single 3.3 V supply
- Low active power of 160 mW/channel
- I2C/SMBus or EEPROM programming
- Automatic receiver detection for PCIe use cases
- Seamless support for PCIe link training
- Internal voltage regulator provides immunity to supply noise
- High speed production testing for reliable manufacturing
- Support for x4, x8, x16 bus width
- 8.90 mm × 22.80 mm BGA package
The DS160PR1601 is a 32-channel (16-channel in each direction) x16 (16-lane) low-power high-performance linear repeater or redriver designed to support PCIe 4.0, UPI 2.0 and other interfaces up to 16 Gbps.
The DS160PR1601 receivers deploy continuous time linear equalizers (CTLE) to provide a programmable high-frequency boost. The equalizer can open an input eye that is completely closed due to inter-symbol interference (ISI) induced by an interconnect medium, such as PCB traces. The CTLE receiver is followed by a linear output driver. The linear datapaths of DS160PR1601 preserves transmit preset signal characteristics. The linear redriver becomes part of the passive channel that as a whole get link trained for best transmit and receive equalization settings. This transparency in the link training protocol results in best electrical link and lowest possible latency. Low channel-channel cross-talk, low additive jitter and excellent return loss makes the device almost a passive element in the link, but with its equalization.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | DS160PR1601 16 Gbps 16 Lane Linear Redriver datasheet | PDF | HTML | 2023年 2月 2日 |
User guide | DS160PR1601 and DS320PR1601 Programming Guide (Rev. A) | PDF | HTML | 2023年 6月 20日 | |
EVM User's guide | DS320PR1601-RSC-EVM User's Guide (Rev. A) | PDF | HTML | 2023年 1月 26日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
DS320PR1601RSCEVM — DS320PR1601 32 通道 PCIe® 5.0 線性轉接驅動器評估模組
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
NFBGA (ZDG) | 354 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。