LP3907
- Input Voltage Range: 2.8 V to 5.5 V
- Compatible with Advanced Applications Processors and FPGAs
- 2 LDOs for Powering Internal Processor Functions and I/Os
- High-Speed Serial Interface for Independent Control of Device Functions and Settings
- Precision Internal Reference
- Thermal Overload Protection
- Current Overload Protection
- Software Programmable Regulators
- External Power-On-Reset Function for Buck1 and Buck2 (Power Good with Delay Function)
- Undervoltage Lockout Detector to Monitor Input Supply Voltage
- Step-Down DC-DC Converters (Buck)
- Programmable VOUT from:
- Buck1 : 0.8 V–2 V at 1 A
- Buck2 : 1 V–3.5 V at 600 mA
- Up to 96% Efficiency
- 2.1-MHz PWM Switching Frequency
- PWM-to-PFM Automatic Mode Change
Under Low Loads - ±3% Output Voltage Accuracy
- Automatic Soft Start
- Programmable VOUT from:
- Linear Regulators (LDO)
- Programmable VOUT of 1 V to 3.5 V
(except JJ11, FX6W, and JX6X options) - 300-mA Output Current
- 30-mV (typical) Dropout
- Create a Custom Design Using the LP3907 With the WEBENCH® Power Designer
- Programmable VOUT of 1 V to 3.5 V
The LP3907 device is a multi-function, programmable power management unit (PMU) optimized for low-power FPGAs, microprocessors, and DSPs. This device integrates two highly efficient 1-A, 600-mA step-down DC-DC converters with dynamic voltage scaling (DVS), two 300-mA linear regulators, and a 400-kHz I2C interface to allow a host controller access to the internal control registers of the device. The LP3907 additionally features programmable power-on sequencing.
Features include programmable power-on sequencing, communication control (I2C), dynamic voltage scaling, overcurrent protection, Power Good, synchronous rectification, thermal shutdown, and undervoltage lockout. For applications requiring light loads, the high-efficiency synchronous switching buck regulators enter PFM mode and operate with reduced switching frequency and supply current to maintain high efficiency at very light loads.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | LP3907 Dual 1-A and 600-mA Buck Converters and Dual 300-mA LDOs With I2C Interface datasheet (Rev. U) | PDF | HTML | 2018年 1月 10日 |
Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
EVM User's guide | Using the LP3907TLEVM Evaluation Module | 2016年 1月 22日 | ||
Application note | Enhancing Bit-Flip Recovery and PMU Design For Defense/Industrial Applications | 2014年 8月 14日 | ||
Application note | Parasitics can Hinder Switcher Regulator and LDO Designs (Rev. A) | 2014年 7月 1日 | ||
User guide | Evaluation Kit for LP3907 Programmable Pwr Management Unit w/ I2C Compatible I/F (Rev. A) | 2013年 4月 30日 | ||
Application note | Saving Energy via Smart Power Management (Power Designer-118) | 2012年 2月 17日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
DSBGA (YZR) | 25 | Ultra Librarian |
WQFN (RTW) | 24 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
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