首頁 介面 HDMI、顯示介面和 MIPI IC
首頁
介面
HDMI、顯示介面和 MIPI IC

SN65DP141

現行

12-Gbps DP 1.4/ eDP1.4 線性轉接驅動器

立即訂購
產品規格表

SN65DP141

現行
產品規格表 立即訂購

產品詳細資料

Type Redriver Protocols DisplayPort Rating Catalog Speed (max) (Gbpp) 12 Number of channels 1 Supply voltage (V) 2.5, 3.3 Operating temperature range (°C) -40 to 85
Type Redriver Protocols DisplayPort Rating Catalog Speed (max) (Gbpp) 12 Number of channels 1 Supply voltage (V) 2.5, 3.3 Operating temperature range (°C) -40 to 85
WQFN (RLJ) 38 35 mm² 7 x 5
  • Supports VESA DisplayPort 1.4a, 2.0, and eDP 1.4
  • Quad channel linear redriver supporting data rates up to 12 Gbps including DisplayPort RBR, HBR, HBR2, HBR3, and UHBR10
  • Protocol agnostic
  • Transparent to DP link training
  • Position independent on the link suitable for source, sink, and cable applications
  • 15-dB analog equalization at 6 GHz
  • Output linear dynamic range: 1200 mV
  • Bandwidth: >20 GHz
  • Better than 16-dB return loss at 6 GHz
  • 2.5-V or 3.3-V ±5% single power supply option
  • Low power consumption with 80 mW per channel at 2.5 V VCC
  • GPIO or I2C control
  • Supports VESA DisplayPort 1.4a, 2.0, and eDP 1.4
  • Quad channel linear redriver supporting data rates up to 12 Gbps including DisplayPort RBR, HBR, HBR2, HBR3, and UHBR10
  • Protocol agnostic
  • Transparent to DP link training
  • Position independent on the link suitable for source, sink, and cable applications
  • 15-dB analog equalization at 6 GHz
  • Output linear dynamic range: 1200 mV
  • Bandwidth: >20 GHz
  • Better than 16-dB return loss at 6 GHz
  • 2.5-V or 3.3-V ±5% single power supply option
  • Low power consumption with 80 mW per channel at 2.5 V VCC
  • GPIO or I2C control

The SN65DP141 is an asynchronous, protocol-agnostic, low latency, four-channel linear equalizer optimized for use up to 12 Gbps and compensates for losses due to board traces and cables.

The device is transparent to DisplayPort (DP) link training such a way that a DP source and a sink can perform effective link training overcoming traditional aux snooping re-drivers’ shortcomings. Additionally, the device is position independent. It can be placed inside source, cable or sink effectively providing a negative loss component to the overall link budget. Linear equalization inside SN65DP141 also increases link margin when used with a receiver implementing Decision Feedback Equalization (DFE).

SN65DP141 allows independent channel control for equalization, gain, dynamic range using both I2C and GPIO configurations.

.

.

The SN65DP141 is an asynchronous, protocol-agnostic, low latency, four-channel linear equalizer optimized for use up to 12 Gbps and compensates for losses due to board traces and cables.

The device is transparent to DisplayPort (DP) link training such a way that a DP source and a sink can perform effective link training overcoming traditional aux snooping re-drivers’ shortcomings. Additionally, the device is position independent. It can be placed inside source, cable or sink effectively providing a negative loss component to the overall link budget. Linear equalization inside SN65DP141 also increases link margin when used with a receiver implementing Decision Feedback Equalization (DFE).

SN65DP141 allows independent channel control for equalization, gain, dynamic range using both I2C and GPIO configurations.

.

.
filter 尋找其它 HDMI、顯示介面和 MIPI IC
下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 4
類型 標題 日期
* Data sheet SN65DP141 DisplayPort Linear Redriver datasheet (Rev. C) PDF | HTML 2021年 12月 17日
Technical article How to select a redriver or retimer for HDMI 2.0 jitter cleansing PDF | HTML 2017年 5月 1日
White paper Build a true fidelity system using video signal conditioners 2016年 6月 9日
EVM User's guide DP141 Evaluation Module Users Guide 2016年 4月 11日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DP141RLJEVM — 支援 RBR、HBR、HBR2 和 HBR3 (12 Gbps) 的 DP141 DisplayPort 線性轉接驅動器評估模組

The DP141 EVM is designed to evaluate DP141 device at a system level using standard DisplayPort connection.  The EVM provides standard DP connectors which can be utilized to connect to a DisplayPort source or sink systems to evaluate DP141 settings.
使用指南: PDF
TI.com 無法提供
模擬型號

SN65DP141 S-Parameter Model

SLLM356.ZIP (4448 KB) - S-Parameter Model
下載
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
View Options
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (RLJ) 38 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片