SN65EPT22
- Dual 3.3V LVTTL to LVPECL Buffer
- Operating Range
- LVPECL VCC = 3.0 V to 3.6 V With
GND = 0 V
- LVPECL VCC = 3.0 V to 3.6 V With
- Support for Clock Frequencies to 2.0 GHz (typ)
- 420 ps Typical Propagation Delay
- Deterministic HIGH Output Value for Open Input
Conditions - Built-in Temperature Compensation
- Drop in Compatible to MC100ELT23
- PNP Single Ended Inputs for Minimal Loading
- APPLICATIONS
- Data and Clock Transmission Over Backplane
- Signaling Level Conversion
All other trademarks are the property of their respective owners
The SN65EPT22 is a low power dual LVTTL to LVPECL translator device. The device includes circuitry to maintain known logic HIGH level when inputs are in open condition. The SN65EPT22 is housed in an industry standard SOIC-8 package and is also available in TSSOP-8 package option.
技術文件
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檢視所有 2 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SN65EPT22 3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Buffer datasheet (Rev. B) | PDF | HTML | 2014年 11月 19日 |
Application note | AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) | 2007年 10月 17日 |
設計與開發
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模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 8 | Ultra Librarian |
VSSOP (DGK) | 8 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。