TLK2711-SP

現行

耐輻射 1.6 至 2.5-Gbps V 類收發器

產品詳細資料

Protocols Space Rating Space Operating temperature range (°C) -55 to 125
Protocols Space Rating Space Operating temperature range (°C) -55 to 125
CFP (HFG) 68 195.1609 mm² 13.97 x 13.97
  • 1.6Gbps to 2.5Gbps (Gigabits per second) serializer/deserializer
  • Hot-plug protection
  • High-performance 68-pin ceramic quad flat pack package (HFG)
  • Low-power operation
  • Programmable preemphasis levels on serial output
  • Interfaces to backplane, copper cables, or optical converters
  • On-chip 8-bit/10-bit encoding/decoding, comma detect
  • On-chip PLL provides clock synthesis from low-speed reference
  • Low power: < 500mW
  • 3V tolerance on parallel data input signals
  • 16-bit parallel TTL-compatible data interface
  • Designed for high-speed backplane interconnect and point-to-point data link
  • Military temperature range (–55°C to 125°C Tcase)
  • Loss-of-Signal (LOS) detection
  • Integrated 50Ω termination resistors on RX
  • Engineering evaluation (/EM) samples are available (1)

(1)These units are intended for engineering evaluation only. They are processed to a non-compliant flow (for example, no burn-in, and so forth) and are tested to temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing, or flight use. Parts are not warranted for performance on full MIL specified temperature range of –55°C to 125°C or operating life.

  • 1.6Gbps to 2.5Gbps (Gigabits per second) serializer/deserializer
  • Hot-plug protection
  • High-performance 68-pin ceramic quad flat pack package (HFG)
  • Low-power operation
  • Programmable preemphasis levels on serial output
  • Interfaces to backplane, copper cables, or optical converters
  • On-chip 8-bit/10-bit encoding/decoding, comma detect
  • On-chip PLL provides clock synthesis from low-speed reference
  • Low power: < 500mW
  • 3V tolerance on parallel data input signals
  • 16-bit parallel TTL-compatible data interface
  • Designed for high-speed backplane interconnect and point-to-point data link
  • Military temperature range (–55°C to 125°C Tcase)
  • Loss-of-Signal (LOS) detection
  • Integrated 50Ω termination resistors on RX
  • Engineering evaluation (/EM) samples are available (1)

(1)These units are intended for engineering evaluation only. They are processed to a non-compliant flow (for example, no burn-in, and so forth) and are tested to temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing, or flight use. Parts are not warranted for performance on full MIL specified temperature range of –55°C to 125°C or operating life.

The TLK2711-SP is a member of the WizardLink transceiver family of multigigabit transceivers, intended for use in ultra-high-speed bidirectional point-to-point data transmission systems. The TLK2711-SP supports an effective serial interface speed of 1.6Gbps to 2.5Gbps, providing up to 2Gbps of data bandwidth.

The primary application of the TLK2711-SP is to provide high-speed I/O data channels for point-to-point baseband data transmission over controlled impedance media of approximately 50Ω. The transmission media can be printed circuit board, copper cables, or fiber-optic cable. The maximum rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

This device can also be used to replace parallel data transmission architectures by providing a reduction in the number of traces, connector pins, and transmit/receive pins. Parallel data loaded into the transmitter is delivered to the receiver over a serial channel, which can be a coaxial copper cable, a controlled impedance backplane, or an optical link. It is then reconstructed into its original parallel format. It offers significant power and cost savings over parallel solutions, as well as scalability for higher data rates in the future.

The TLK2711-SP performs parallel-to-serial and serial-to-parallel data conversion. The clock extraction functions as a physical layer (PHY) interface device. The serial transceiver interface operates at a maximum speed of 2.5Gbps. The transmitter latches 16-bit parallel data at a rate based on the supplied reference clock (TXCLK). The 16-bit parallel data is internally encoded into 20 bits using an 8-bit/10-bit (8b/10b) encoding format. The resulting 20-bit word is then transmitted differentially at 20× the reference clock (TXCLK) rate. The receiver section performs the serial-to-parallel conversion on the input data, synchronizing the resulting 20-bit wide parallel data to the recovered clock (RXCLK). It then decodes the 20-bit wide data using the 8-bit/10-bit decoding format resulting in 16 bits of parallel data at the receive data pins (RXD0–RXD15). The outcome is an effective data payload of 1.28Gbps to 2Gbps (16 bits data × the frequency).

The TLK2711-SP is available in a 68-pin ceramic nonconductive tie-bar package (HFG).

The TLK2711-SP provides an internal loopback capability for self-test purposes. Serial data from the serializer is passed directly to the deserializer, providing the protocol device with a functional self-check of the physical interface.

The TLK2711-SP is a member of the WizardLink transceiver family of multigigabit transceivers, intended for use in ultra-high-speed bidirectional point-to-point data transmission systems. The TLK2711-SP supports an effective serial interface speed of 1.6Gbps to 2.5Gbps, providing up to 2Gbps of data bandwidth.

The primary application of the TLK2711-SP is to provide high-speed I/O data channels for point-to-point baseband data transmission over controlled impedance media of approximately 50Ω. The transmission media can be printed circuit board, copper cables, or fiber-optic cable. The maximum rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

This device can also be used to replace parallel data transmission architectures by providing a reduction in the number of traces, connector pins, and transmit/receive pins. Parallel data loaded into the transmitter is delivered to the receiver over a serial channel, which can be a coaxial copper cable, a controlled impedance backplane, or an optical link. It is then reconstructed into its original parallel format. It offers significant power and cost savings over parallel solutions, as well as scalability for higher data rates in the future.

The TLK2711-SP performs parallel-to-serial and serial-to-parallel data conversion. The clock extraction functions as a physical layer (PHY) interface device. The serial transceiver interface operates at a maximum speed of 2.5Gbps. The transmitter latches 16-bit parallel data at a rate based on the supplied reference clock (TXCLK). The 16-bit parallel data is internally encoded into 20 bits using an 8-bit/10-bit (8b/10b) encoding format. The resulting 20-bit word is then transmitted differentially at 20× the reference clock (TXCLK) rate. The receiver section performs the serial-to-parallel conversion on the input data, synchronizing the resulting 20-bit wide parallel data to the recovered clock (RXCLK). It then decodes the 20-bit wide data using the 8-bit/10-bit decoding format resulting in 16 bits of parallel data at the receive data pins (RXD0–RXD15). The outcome is an effective data payload of 1.28Gbps to 2Gbps (16 bits data × the frequency).

The TLK2711-SP is available in a 68-pin ceramic nonconductive tie-bar package (HFG).

The TLK2711-SP provides an internal loopback capability for self-test purposes. Serial data from the serializer is passed directly to the deserializer, providing the protocol device with a functional self-check of the physical interface.

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類型 標題 日期
* Data sheet TLK2711-SP 1.6Gbps to 2.5Gbps Class V Transceiver datasheet (Rev. Q) PDF | HTML 2024年 8月 9日
* SMD TLK2711-SP SMD 5962-05221 2016年 7月 8日
* Radiation & reliability report TLK2711 Radiation Test Report 2015年 3月 31日
* Radiation & reliability report TLK2711 TID and SEE Report 2015年 3月 31日
* Radiation & reliability report TLK2711-SP SEE Report 2015年 3月 31日
Application brief DLA Approved Optimizations for QML Products (Rev. B) PDF | HTML 2024年 5月 17日
Selection guide TI Space Products (Rev. J) 2024年 2月 12日
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 2023年 8月 31日
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 2022年 11月 17日
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022年 10月 19日
E-book Radiation Handbook for Electronics (Rev. A) 2019年 5月 21日
White paper TLK2711-SP Unpowered Receiver Stress Evaluation 2018年 2月 27日
Technical article 7 things to know about spacecraft subsystems before your next trip to Mars PDF | HTML 2016年 7月 6日
EVM User's guide TLK2711 Serdes EVM Kit Setup and Usage (Rev. A) 2012年 8月 10日
Application note Using the TLK2711-SP with Minimal Protocol (Rev. A) 2011年 8月 15日

設計與開發

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開發板

TLK2711EVM-CVAL — TLK2711EVM-CVAL SerDes 評估模組板

The Texas Instruments TLK2711 serdes evaluation module (EVM) board is used to evaluate the TLK2711 device for point-to-point data transmission applications. The board enables the designer to connect 50-W parallel buses to both transmitter and receiver connectors. The TLK2711, using high speed PLL (...)

使用指南: PDF
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模擬型號

TLK2711-SP IBIS MODEL

SLYM079.ZIP (25 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
CFP (HFG) 68 Ultra Librarian

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