TPD12S015A
- Conforms to HDMI Compliance Tests Without Any External Components
- Supports HDMI 1.3 and HDMI 1.4 Data Rate
- Match Class D and Class C Pin Mapping
- Excellent Matching Capacitance (0.05 pF) in Each Differential Signal Pair
- Internal Boost Converter to Generate 5 V From a 2.3-V to 5.5-V Battery Voltage
- Auto-Direction Sensing Level Shifting in the CEC, SDA, and SCL Paths
- IEC 61000-4-2 (Level 4) System Level ESD Compliance
- Improved Drop-In Replacement for the Industry Popular TPD12S015A
- Industrial Temperature Range: –40°C to 85°C
The TPD12S015A device is an integrated HDMI companion chip solution. This device offers 8 low capacitance ESD clamps allowing HDMI 1.3/1.4 data rates. The 0.4-mm pitch DSBGA package pin mapping matches the HDMI Type D or Type C connectors. The integrated ESD clamps in monolithic silicon technology provide good matching between each differential signal pair. This provides an advantage over discrete ESD clamp solutions where variations between ESD clamps degrade the differential signal quality.
The TPD12S015A provides a regulated 5-V output (5VOUT) for sourcing the HDMI power line. The 5VOUT pin supplies minimum 55 mA to the HDMI receiver while meeting the HDMI 5VOUT specifications. The 5VOUT and the hot plug detect (HPD) circuitry are independent of the LS_OE control signal; they are controlled by the CT_CP_HPD pin. This independent control enables the detection scheme (5VOUT + HPD) to be active before enabling the HDMI link. The HPD_B port has a glitch filter to avoid false detection due to the bouncing while inserting the HDMI plug.
There are three noninverting bidirectional translation circuits for the SDA, SCL, and CEC lines; they are controlled by the LS_OE control signal. Each have a common power rail (VCCA) on the A side from 1.1 V to 3.6 V. On the B side, the SCL_B and SDA_B each have an internal 1.75-kΩ pullup connected to the regulated 5-V rail (5VOUT). The SCL and SDA pins meet the I2C specifications, and drive at least 750-pF loads which exceeds the HDMI cable specification. An LDO generates a 3.3-V internal rail for the CEC line operation when LS_OE = H & CT_CP_HPD = H. The CEC_B pin has a 26-kΩ pullup to this internal 3.3-V rail.
The TPD12S015A provides IEC61000-4-2 (Level 4) ESD protection. This device is offered in a space-saving 1.56-mm × 2.76-mm DSBGA package.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TPD12S015A HDMI Companion Chip With Step-Up DC-DC, I2C Level Shifter, and High-Speed ESD Clamps datasheet (Rev. D) | PDF | HTML | 2016年 2月 22日 |
User guide | Reading and Understanding an ESD Protection Data Sheet (Rev. A) | PDF | HTML | 2023年 9月 19日 | |
Application note | ESD Protection Layout Guide (Rev. A) | PDF | HTML | 2022年 4月 7日 | |
White paper | Designing USB for short-to-battery tolerance in automotive environments | 2016年 2月 10日 | ||
Analog Design Journal | Design Considerations for System-Level ESD Circuit Protection | 2012年 9月 25日 | ||
EVM User's guide | TPD12S015A EVM User's Guide | 2011年 6月 17日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
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DSBGA (YFF) | 28 | Ultra Librarian |
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