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AC/DC 和 DC/DC 轉換器 (整合式 FET)

TPS54327

現行

4.5V 至 18V 輸入，3-A 同步降壓轉換器

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功能與所比較的裝置相似
最新 TPS563206 現行 採用 SOT563 的 4.2-V 至 17-V 輸入、3-A 同步降壓轉換器 This product has a smaller package with less external component count

TPS54327

現行
產品規格表 立即訂購

產品詳細資料

Rating Catalog Operating temperature range (°C) -40 to 85 Topology Buck Type Converter Iout (max) (A) 3 Vin (min) (V) 4.5 Vin (max) (V) 18 Switching frequency (min) (kHz) 700 Switching frequency (max) (kHz) 700 Features Enable, Soft Start Adjustable, Synchronous Rectification Control mode D-CAP2 Vout (min) (V) 0.76 Vout (max) (V) 7 Iq (typ) (µA) 800 Duty cycle (max) (%) 65
Rating Catalog Operating temperature range (°C) -40 to 85 Topology Buck Type Converter Iout (max) (A) 3 Vin (min) (V) 4.5 Vin (max) (V) 18 Switching frequency (min) (kHz) 700 Switching frequency (max) (kHz) 700 Features Enable, Soft Start Adjustable, Synchronous Rectification Control mode D-CAP2 Vout (min) (V) 0.76 Vout (max) (V) 7 Iq (typ) (µA) 800 Duty cycle (max) (%) 65
HSOIC (DDA) 8 29.4 mm² 4.9 x 6 VSON (DRC) 10 9 mm² 3 x 3
  • D-CAP2™ Mode Enables Fast Transient
    Response
  • Low-Output Ripple and Allows Ceramic Output
    Capacitor
  • Wide VIN Input Voltage Range: 4.5 V to 18 V
  • Output Voltage Range: 0.76 V to 7 V
  • Highly Efficient Integrated FETs Optimized
    for Lower Duty Cycle Applications
    – 100 mΩ (High-Side) and 70 mΩ (Low-Side)
  • High Efficiency, Less Than 10 µA at shutdown
  • High Initial Bandgap Reference Accuracy
  • Adjustable Soft Start
  • Prebiased Soft Start
  • 700-kHz Switching Frequency (fSW)
  • Cycle-By-Cycle Overcurrent Limit
  • APPLICATIONS
    • Wide Range of Applications for Low Voltage
      System
      • Digital TV Power Supply
      • High Definition Blu-ray Disc™ Players
      • Networking Home Terminal
      • Digital Set Top Box (STB)

All other trademarks are the property of their respective owners
  • D-CAP2™ Mode Enables Fast Transient
    Response
  • Low-Output Ripple and Allows Ceramic Output
    Capacitor
  • Wide VIN Input Voltage Range: 4.5 V to 18 V
  • Output Voltage Range: 0.76 V to 7 V
  • Highly Efficient Integrated FETs Optimized
    for Lower Duty Cycle Applications
    – 100 mΩ (High-Side) and 70 mΩ (Low-Side)
  • High Efficiency, Less Than 10 µA at shutdown
  • High Initial Bandgap Reference Accuracy
  • Adjustable Soft Start
  • Prebiased Soft Start
  • 700-kHz Switching Frequency (fSW)
  • Cycle-By-Cycle Overcurrent Limit
  • APPLICATIONS
    • Wide Range of Applications for Low Voltage
      System
      • Digital TV Power Supply
      • High Definition Blu-ray Disc™ Players
      • Networking Home Terminal
      • Digital Set Top Box (STB)

All other trademarks are the property of their respective owners

The TPS54327 device is an adaptive on-time D-CAP2™ mode synchronous buck converter. TheTPS54327 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54327 uses the D-CAP2 mode control which provides a fast transient response with no external compensation components. The TPS54327 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54327 is available in the 8-pin DDA package and 10-pin DRC, and is designed to operate from –40°C to 85°C.

The TPS54327 device is an adaptive on-time D-CAP2™ mode synchronous buck converter. TheTPS54327 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54327 uses the D-CAP2 mode control which provides a fast transient response with no external compensation components. The TPS54327 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54327 is available in the 8-pin DDA package and 10-pin DRC, and is designed to operate from –40°C to 85°C.
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類型 標題 日期
* Data sheet TPS54327 3-A Output Single Synchronous Step-Down Switcher With Integrated FET datasheet (Rev. C) PDF | HTML 2015年 12月 18日
User guide TPS54327 Step-Down Converter Evaluation Module User's Guide (Rev. A) PDF | HTML 2021年 10月 11日
Selection guide Power Management Guide 2018 (Rev. R) 2018年 6月 25日
Application note Optimize Output Filter on D-CAP2 for Stability Improvement 2017年 6月 13日
Application note D-CAP2 Frequency Response Model, based on frequency domain analysis of Fixed On- 2013年 1月 2日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TPS54327EVM-686 — 適用於 TPS54327 3-A 同步降壓轉換器的評估模組

The TPS54327EVM-686 is a fully assembled and tested circuit for evaluating the TPS54327 synchronous step-down converter. The TPS54327EVM-686 operates from a 4.5-V to 18-V input and provides a 1.05-V output up to 3-A load. The main control loop of TPS54327 uses D-CAP2™ mode control, which (...)

使用指南: PDF | HTML
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模擬型號

TPS54327 PSPICE (Transient) Model

SLVM108.ZIP (53 KB) - PSpice Model
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模擬型號

TPS54327 TINA-TI Transient Reference Design

SLVM310.TSC (164 KB) - TINA-TI Reference Design
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模擬型號

TPS54327 TINA-TI Transient Spice Model

SLVM311.ZIP (39 KB) - TINA-TI Spice Model
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參考設計

TIDA-00431 — 採用 8 GHz DC 耦合差動放大器的射頻取樣 4 GSPS ADC 參考設計

Wideband radio frequency (RF) receivers allow greatly increased flexibility in radio designs. The wide instantaneous bandwidth allows flexible tuning without changing hardware and the ability to capture multiple channels at widely separated frequencies.

This reference design describes a wideband RF (...)

Design guide: PDF
電路圖: PDF
參考設計

TIDA-01017 — 適用於示波器、無線測試器和雷達的高速多通道 ADC 時鐘參考設計

The TIDA-01017 reference design demonstrates the performance of a clocking solution for a high speed multi-channel system, analyzed by measuring the channel to channel skew for the entire input frequency range of the RF sampling ADC. Channel to channel skew is critical for phased array radar and (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01015 — 適用於數位示波器和無線測試器中的 12 位元高速 ADC 的 4 GHz 時鐘參考設計

The TIDA-01015 is a clocking solution reference design for high speed direct RF sampling GSPS ADCs. This design showcases the significance of the sampling clock to achieve high SNR for 2nd Nyquist zone input signal frequencies. ADC12J4000 is a 12-bit, 4-GSPS RF sampling ADC with 3-dB input (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00826 — 50 Ohm 2 GHz 示波器前端參考設計

This reference design is part of an analog front-end for 50Ω-input oscilloscope application. System designers can readily use this evaluation platform to process input signals from DC to 2 GHz in both frequency-domain and time-domain applications.
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00432 — 使用適用於相位陣列雷達系統的 Xilinx 平台，將 JESD204B Giga-Sample ADC 同步化

This system level design shows how two ADC12J4000 evaluation modules (EVMs) can be synchronized together using a Xilinx VC707 platform. The design document describes the required hardware modifications and device configurations, including the clocking scheme. Example configuration files are shown (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00359 — 適用於 GSPS ADC 的時鐘解決方案參考設計

Low cost, high performance clocking solution for GSPS data converters. This reference design discusses the use of a TRF3765, a low noise frequency synthesizer, generating the sampling clock for a 4 GSPS analog-to-digital converter (ADC12J4000). Experiments demonstrate data sheet comparable SNR and (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
HSOIC (DDA) 8 Ultra Librarian
VSON (DRC) 10 Ultra Librarian
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