TPS65022
- 1.2-A, 97% Efficient Step-Down Converter for
System Voltage (VDCDC1) - 1-A, Up to 95% Efficient Step-Down Converter for
Memory Voltage (VDCDC2) - 900-mA, 90% Efficient Step-Down Converter for
Processor Core (VDCDC3) - 30-mA LDO and Switch for Real-Time Clock
(VRTC) - 2 × 200 mA General-Purpose LDO
- Dynamic Voltage Management for Processor Core
- Preselectable LDO Voltage Using Two Digital
Input Pins - Externally Adjustable Reset Delay Time
- Battery Backup Functionality
- Separate Enable Pins for Inductive Converters
- I2C Compatible Serial Interface
- 85-µA Quiescent Current
- Low Ripple PFM Mode
- Thermal Shutdown Protection
The TPS65022 is an integrated Power Management IC for applications powered by one Li-Ion or Li-Polymer cell, and which require multiple power rails. The TPS65022 provides three highly efficient, step-down converters targeted at providing the core voltage, peripheral, I/O and memory rails in a processor based system.
All three step-down converters enter a low-power mode at light load for maximum efficiency across the widest possible range of load currents. The TPS65022 also integrates two general-purpose 200-mA LDO voltage regulators, which are enabled with an external input pin. Each LDO operates with an input voltage range between 1.5 V and 6.5 V, allowing them to be supplied from one of the step-down converters or directly from the battery.
The default output voltage of the LDOs can be digitally set to 4 different voltage combinations using the DEFLDO1 and DEFLDO2 pins.
The serial interface can be used for dynamic voltage scaling, masking interrupts, or for disabling, enabling, and setting the LDO output voltages. The interface is compatible with the Fast/Standard mode I2C specification, allowing transfers at up to 400 kHz. The TPS65022 is available in a 40-pin (RHA) VQFN package, and operates over a free-air temperature of –40°C to 85°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS65022 Power Management IC for Li-Ion Powered Systems datasheet (Rev. B) | PDF | HTML | 2016年 1月 13日 |
| Application note | Optimizing Resistor Dividers at a Comparator (Rev. B) | PDF | HTML | 2021年 4月 30日 | |
| Application note | LDO Noise Demystified (Rev. B) | PDF | HTML | 2020年 8月 18日 | |
| Application note | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 2017年 8月 9日 | |
| Application note | Basic Calculation of a Buck Converter's Power Stage (Rev. B) | 2015年 8月 17日 | ||
| Application note | Understanding the Absolute Maximum Ratings of the SW Node (Rev. A) | 2012年 1月 13日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RHA) | 40 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點