TPS652510

現行

4.5-V 至 16-V 輸入、3A/2A/2A 輸出、同步三路降壓轉換器

產品詳細資料

Rating Catalog Operating temperature range (°C) -40 to 85 Topology Buck Type Converter Iout (max) (A) 3 Vin (min) (V) 4.5 Vin (max) (V) 16 Switching frequency (min) (kHz) 300 Switching frequency (max) (kHz) 2200 Features Adjustable current limit, Enable, Frequency synchronization, Light Load Efficiency, Phase Interleaving, Power good, Pre-Bias Start-Up, Soft Start Adjustable, Synchronous Rectification, UVLO adjustable Control mode current mode Vout (min) (V) 0.8 Vout (max) (V) 15 Iq (typ) (µA) 600 Duty cycle (max) (%) 100
Rating Catalog Operating temperature range (°C) -40 to 85 Topology Buck Type Converter Iout (max) (A) 3 Vin (min) (V) 4.5 Vin (max) (V) 16 Switching frequency (min) (kHz) 300 Switching frequency (max) (kHz) 2200 Features Adjustable current limit, Enable, Frequency synchronization, Light Load Efficiency, Phase Interleaving, Power good, Pre-Bias Start-Up, Soft Start Adjustable, Synchronous Rectification, UVLO adjustable Control mode current mode Vout (min) (V) 0.8 Vout (max) (V) 15 Iq (typ) (µA) 600 Duty cycle (max) (%) 100
VQFN (RHA) 40 36 mm² 6 x 6
  • Wide Input Supply Voltage Range:
    4.5 V – 16 V
  • 0.8-V, 1% Accuracy Reference
  • Continuous Loading:
    3 A (Buck1), 2 A (Buck2 and 3)
  • Maximum Current:
    3.5 A (Buck 1), 2.5 A (Buck2 and 3)
  • Synchronous Operation, 300-kHz –
    2.2-MHz Switching Frequency Set By External Resistor
  • External Enable Pins With
    Built-In Current Source for Easy Sequencing
  • External Soft Start Pins
  • Adjustable Cycle-by-Cycle Current Limit Set
    by External Resistor
  • Current-Mode Control With Simple Compensation
    Circuit
  • Automatic Low Pulse Skipping (PSM) Power Mode,
    Allowing for an Output Ripple Better than 2%
  • Support Pre-Biased Outputs
  • Power Good Supervisor and Reset Generator
  • Small, Thermally Efficient 40-Pin 6-mm ×
    6-mm RHA (QFN) package
  • –40°C to 125°C Junction Temperature Range

  • Wide Input Supply Voltage Range:
    4.5 V – 16 V
  • 0.8-V, 1% Accuracy Reference
  • Continuous Loading:
    3 A (Buck1), 2 A (Buck2 and 3)
  • Maximum Current:
    3.5 A (Buck 1), 2.5 A (Buck2 and 3)
  • Synchronous Operation, 300-kHz –
    2.2-MHz Switching Frequency Set By External Resistor
  • External Enable Pins With
    Built-In Current Source for Easy Sequencing
  • External Soft Start Pins
  • Adjustable Cycle-by-Cycle Current Limit Set
    by External Resistor
  • Current-Mode Control With Simple Compensation
    Circuit
  • Automatic Low Pulse Skipping (PSM) Power Mode,
    Allowing for an Output Ripple Better than 2%
  • Support Pre-Biased Outputs
  • Power Good Supervisor and Reset Generator
  • Small, Thermally Efficient 40-Pin 6-mm ×
    6-mm RHA (QFN) package
  • –40°C to 125°C Junction Temperature Range

TPS652510 is a power management IC with three step-down buck converters. Both high-side and low-side MOSFETs are integrated to provide fully synchronous conversion with higher efficiency. The converters are designed to simplify its application while giving the designer the option to optimize their usage according to the target application.

The converters can operate in 5-, 9-, 12- or 15-V systems. The output voltage can be set externally using a resistor divider to any value between 0.8 V and the input supply minus the resistive drops on the converter path. Each converter features enable pin that allows a delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time by choosing the soft-start capacitor, and a current limit (RLIM) pin that enables designer to adjust current limit by selecting an external resistor and optimize the choice of inductor. All converters operate in ‘hiccup mode’: Once an over-current lasting more than 10 ms is sensed in any of the converters, they will shut down for 10 ms and then the start-up sequencing will be tried again. If the overload has been removed, the converter will ramp up and operate normally. If this is not the case the converter will see another over-current event and shuts down again repeating the cycle (hiccup) until the failure is cleared. If an overload condition lasts for less than 10 ms, only the relevant converter affected will shut-down and re-start and no global hiccup mode will occur.

The switching frequency of the converters is set by an external resistor connected to ROSC pin. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. The converters operate with 180° phase between then to minimize the input filter requirements. All converters have peak current mode control which simplifies external frequency compensation.

The device has a built-in slope compensation ramp to prevent sub harmonic oscillations in peak current mode control. A traditional type II compensation network can stabilize the system and achieve fast transient response. Moreover, an optional capacitor in parallel with the upper resistor of the feedback divider provides one more zero and makes the crossover frequency over 100 kHz.

All converters feature an automatic low power pulse PFM skipping mode which improves efficiency during light loads and standby operation, while guaranteeing a very low output ripple, allowing for a value of less than 2% at low output voltages.

The device incorporates an overvoltage transient protection circuit to minimize voltage overshoot. The OVP feature minimizes the output overshoot by implementing a circuit to compare the FB pin voltage to OVP threshold which is 109% of the internal voltage reference. If the FB pin voltage is greater than the OVTP threshold, the high side MOSFET is disabled preventing current from flowing to the output and minimizing output overshoot. When the FB voltage drops lower than the OVP lower threshold which is 107%, the high side MOSFET is allowed to turn on the next clock cycle.

TPS652510 features a supervisor circuit which monitors each buck’s output and the PGOOD pin is asserted once sequencing is done. The PGOOD pin is an open drain output. The PGOOD pin is pulled low when any buck converter is pulled below 85% of the nominal output voltage. The PGOOD is pulled up when all converter outputs are more than 90% of its nominal output voltage. The default reset time is 100 ms. The polarity of the PGOOD is active high.

The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 160°C. The thermal shutdown forces the device to stop operating when the junction temperature exceeds thermal trip threshold. Once the die temperature decreases below 140°C, the device reinitiates the power up sequence. The thermal shutdown hysteresis is 20°C.

TPS652510 is a power management IC with three step-down buck converters. Both high-side and low-side MOSFETs are integrated to provide fully synchronous conversion with higher efficiency. The converters are designed to simplify its application while giving the designer the option to optimize their usage according to the target application.

The converters can operate in 5-, 9-, 12- or 15-V systems. The output voltage can be set externally using a resistor divider to any value between 0.8 V and the input supply minus the resistive drops on the converter path. Each converter features enable pin that allows a delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time by choosing the soft-start capacitor, and a current limit (RLIM) pin that enables designer to adjust current limit by selecting an external resistor and optimize the choice of inductor. All converters operate in ‘hiccup mode’: Once an over-current lasting more than 10 ms is sensed in any of the converters, they will shut down for 10 ms and then the start-up sequencing will be tried again. If the overload has been removed, the converter will ramp up and operate normally. If this is not the case the converter will see another over-current event and shuts down again repeating the cycle (hiccup) until the failure is cleared. If an overload condition lasts for less than 10 ms, only the relevant converter affected will shut-down and re-start and no global hiccup mode will occur.

The switching frequency of the converters is set by an external resistor connected to ROSC pin. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. The converters operate with 180° phase between then to minimize the input filter requirements. All converters have peak current mode control which simplifies external frequency compensation.

The device has a built-in slope compensation ramp to prevent sub harmonic oscillations in peak current mode control. A traditional type II compensation network can stabilize the system and achieve fast transient response. Moreover, an optional capacitor in parallel with the upper resistor of the feedback divider provides one more zero and makes the crossover frequency over 100 kHz.

All converters feature an automatic low power pulse PFM skipping mode which improves efficiency during light loads and standby operation, while guaranteeing a very low output ripple, allowing for a value of less than 2% at low output voltages.

The device incorporates an overvoltage transient protection circuit to minimize voltage overshoot. The OVP feature minimizes the output overshoot by implementing a circuit to compare the FB pin voltage to OVP threshold which is 109% of the internal voltage reference. If the FB pin voltage is greater than the OVTP threshold, the high side MOSFET is disabled preventing current from flowing to the output and minimizing output overshoot. When the FB voltage drops lower than the OVP lower threshold which is 107%, the high side MOSFET is allowed to turn on the next clock cycle.

TPS652510 features a supervisor circuit which monitors each buck’s output and the PGOOD pin is asserted once sequencing is done. The PGOOD pin is an open drain output. The PGOOD pin is pulled low when any buck converter is pulled below 85% of the nominal output voltage. The PGOOD is pulled up when all converter outputs are more than 90% of its nominal output voltage. The default reset time is 100 ms. The polarity of the PGOOD is active high.

The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 160°C. The thermal shutdown forces the device to stop operating when the junction temperature exceeds thermal trip threshold. Once the die temperature decreases below 140°C, the device reinitiates the power up sequence. The thermal shutdown hysteresis is 20°C.

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類型 標題 日期
* Data sheet Three DC-DC converters with Integrated FET datasheet (Rev. B) 2013年 8月 7日
EVM User's guide TPS652510 Buck Converter Evaluation Module User's Guide (Rev. A) PDF | HTML 2021年 5月 26日
Application note Measure Power Stage Gain and Slope Compensation in PCM (Peak Current Mode) BUCK (Rev. A) PDF | HTML 2019年 4月 1日
Application note TPS65250/1/2/3 LAYOUT GUIDE 2013年 1月 15日

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TPS652510EVM — TPS652510 高電流、同步降壓式三路降壓切換器評估模組

The TPS652510EVM evaluation module is designed to provide access to the features of the TPS652510. The TPS652510 PMIC is designed to provide 3 , 2 and 2 A continuous outputs with an operational range of 4.5 to 16V and a externally set switching frequency ranging from 300kHz to 2.2MHz, with (...)

使用指南: PDF | HTML
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TPS652510 TINA-TI Average Reference Design

SLVM403.TSC (95 KB) - TINA-TI Reference Design
模擬型號

TPS652510 TINA-TI Average Spice Model

SLVM402.ZIP (8 KB) - TINA-TI Spice Model
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VQFN (RHA) 40 Ultra Librarian

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