TPS736
- Stable with no output capacitor or any value or type of capacitor
- Input voltage range of 1.7V to 5.5V
- Ultra-low dropout voltage: 75mV typ
- Excellent load transient response—with or without optional output capacitor
- NMOS topology delivers low reverse leakage current
- Low noise: 30µVRMS typ (10Hz to 100kHz)
- 0.5% initial accuracy
- 1% overall accuracy over line, load, and temperature
- Less than 1µA max IQ in shutdown mode
- Thermal shutdown and specified min/max current limit protection
- Available in multiple output voltage versions:
- Fixed outputs of 1.20V to 5.0V
- Adjustable output from 1.20V to 5.5V
- Custom outputs available
The TPS736 low-dropout (LDO) linear voltage regulator uses a new topology: an NMOS pass transistor in a voltage-follower configuration. This topology is stable using output capacitors with low ESR, and even allows operation without a capacitor. The device also provides high reverse blockage (low reverse current) and ground pin current that is nearly constant over all output current values.
The TPS736 uses an advanced BiCMOS process to yield high precision while delivering very low dropout voltages and low ground pin current. Current consumption, when not enabled, is under 1µA and designed for portable applications. The extremely low output noise (30µVRMS with 0.1µF CNR) is designed for powering VCOs. This device is protected by thermal shutdown and foldback current limit.
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|---|---|---|
| SOT-223 (DCQ) | 6 | Ultra Librarian |
| SOT-23 (DBV) | 5 | Ultra Librarian |
| VSON (DRB) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。