TPS7A49
- Input Voltage Range: 3 V to 36 V
- Noise:
- 12.7 µVRMS (20 Hz to 20 kHz)
- 15.4 µVRMS (10 Hz to 100 kHz)
- Power-Supply Ripple Rejection:
- 72 dB (120 Hz)
- ≥ 52 dB (10 Hz to 400 kHz)
- Adjustable Output: 1.194 V to 33 V
- Output Current: 150 mA
- Dropout Voltage: 260 mV at 100 mA
- Stable with Ceramic Capacitors ≥ 2.2 µF
- CMOS Logic-Level-Compatible Enable Pin
- Fixed Current-Limit and Thermal Shutdown Protection
- Packages: 8-Pin HVSSOP PowerPAD™ and
3-mm × 3-mm VSON - Operating Temperature Range:
–40°C to 125°C
The TPS7A49 series of devices are positive, high-voltage (36 V), ultralow-noise (15.4 µVRMS, 72-dB PSRR) linear regulators that can source a 150-mA load.
These linear regulators include a CMOS logic-level-compatible enable pin and capacitor-programmable soft-start function that allows for customized power-management schemes. Other available features include built-in current limit and thermal shutdown protection to safeguard the device and system during fault conditions.
The TPS7A49 family is designed using bipolar technology, and is ideal for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This design makes the device an excellent choice to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.
In addition, the TPS7A49 family of linear regulators is suitable for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversion, maximum system performance is provided in sensitive instrumentation, test and measurement, audio, and RF applications.
For applications where positive and negative high-performance rails are required, consider TI’s TPS7A30xx family of negative high-voltage, ultralow-noise linear regulators as well.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS7A49 36-V, 150-mA, Ultralow-Noise, Positive Linear Regulator datasheet (Rev. E) | PDF | HTML | 2015年 5月 26日 |
| White paper | Demystifying LDO Turn-On (startup) Time | PDF | HTML | 2024年 10月 5日 | |
| White paper | Parallel LDO Architecture Design Using Ballast Resistors | PDF | HTML | 2022年 12月 14日 | |
| White paper | Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast | PDF | HTML | 2022年 12月 13日 | |
| Application note | A Topical Index of TI LDO Application Notes (Rev. F) | 2019年 6月 27日 | ||
| Application note | Accurate Thermal Calculations on the Back of a Napkin | 2019年 6月 3日 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
| Selection guide | Low Dropout Regulators Quick Reference Guide (Rev. P) | 2018年 3月 21日 | ||
| EVM User's guide | TPS7A30-49EVM-567 User's Guide | 2010年 8月 27日 |
設計與開發
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Our TI-PMLK LDO experiment board is part of the TI Power Management Lab Kit (TI-PMLK) series. TI-PMLK series provides hands on learning to reinforce power supply knowledge. The modular format lets you customize the TI-PMLK series experience in a way that makes the most impact (...)
TPS7A4901 TINA-TI Transient Reference Design (Rev. A)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| HVSSOP (DGN) | 8 | Ultra Librarian |
| VSON (DRB) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。