TPS7A87
- Two Independent LDO Channels
- Low Output Noise: 3.8 µVRMS (10 Hz–100 kHz)
- Low Dropout: 100 mVMAX at 0.5 A
- Wide Input Voltage Range: 1.4 V to 6.5 V
- Wide Output Voltage Range: 0.8 V to 5.2 V
- High Power-Supply Ripple Rejection:
- 75 dB at DC
- 40 dB at 100 kHz
- 40 dB at 1 MHz
- 1.0% Accuracy Over Line, Load, and Temperature
- Excellent Load Transient Response
- Adjustable Start-Up In-Rush Control
- Selectable Soft-Start Charging Current
- Independent Open-Drain Power-Good (PGx) Outputs
- Stable with a 10 µF or Larger Ceramic Output Capacitor
- 4-mm × 4-mm, 20-Pin WQFN Package
The TPS7A87 is a dual, low-noise (3.8 µVRMS), low-dropout (LDO) voltage regulator capable of sourcing 500 mA per channel with only 100 mV of maximum dropout.
The TPS7A87 provides the flexibility of two independent LDOs and approximately 30% smaller solution size than two single-channel LDOs. Each output is adjustable with external resistors from 0.8 V to 5.2 V. The wide input-voltage range of the TPS7A87 supports operation as low as 1.4 V and up to 6.5 V.
With 1% output voltage accuracy (over line, load, and temperature) and soft-start capabilities to reduce in-rush current, the TPS7A87 is ideal for powering sensitive analog low-voltage devices [such as voltage-controlled oscillators (VCOs), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), complementary metal oxide semiconductor (CMOS) sensors, and video application-specific integrated circuits (ASICs)].
The TPS7A87 is designed to power noise-sensitive components such as those found in instrumentation, medical, video, professional audio, test and measurement, and high-speed communication applications. The very low 3.8-µVRMS output noise and wideband PSRR (40 dB at 1 MHz) minimizes phase noise and clock jitter. These features maximize the performance of clocking devices, ADCs, and DACs.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TPS7A87 Dual, 500-mA, Low-Noise (3.8 μVRMS), LDO Voltage Regulator datasheet (Rev. A) | PDF | HTML | 2016年 7月 12日 |
White paper | Parallel LDO Architecture Design Using Ballast Resistors | PDF | HTML | 2022年 12月 14日 | |
White paper | Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast | PDF | HTML | 2022年 12月 13日 | |
Application note | High-Performance CMOS Image Sensor Power Supply in Industrial Camera and Vision (Rev. A) | 2021年 7月 30日 |
設計與開發
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TPS7A8701EVM-852 — TPS7A87 雙路 500mA 低雜訊 (3.8 μVRMS) LDO 電壓穩壓器評估模組
TIDA-01434 — 適用於 24 位元 ADC 的隔離式、無變壓器、雙極供電參考設計
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
WQFN (RTJ) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。