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AC/DC 和 DC/DC 控制器 (外部 FET)

UC3573

現行

降壓脈衝寬度調變器降壓穩壓器

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UC3573

現行
產品規格表 立即訂購

產品詳細資料

Vin (min) (V) 4.2 Vin (max) (V) 35 Iout (max) (A) 0.5 Operating temperature range (°C) 0 to 70 Rating Catalog Vout (min) (V) 1.5 Vout (max) (V) 30 Features Enable Iq (typ) (µA) 9000 Duty cycle (max) (%) 100 Number of phases 1
Vin (min) (V) 4.2 Vin (max) (V) 35 Iout (max) (A) 0.5 Operating temperature range (°C) 0 to 70 Rating Catalog Vout (min) (V) 1.5 Vout (max) (V) 30 Features Enable Iq (typ) (µA) 9000 Duty cycle (max) (%) 100 Number of phases 1
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Simple Single Inductor Buck PWM Stepdown Voltage Regulation
  • Drives External PMOS Switch
  • Contains UVLO Circuit
  • Includes Pulse-by-Pulse Current Limit
  • Low 50µA Sleep Mode Current
  • Simple Single Inductor Buck PWM Stepdown Voltage Regulation
  • Drives External PMOS Switch
  • Contains UVLO Circuit
  • Includes Pulse-by-Pulse Current Limit
  • Low 50µA Sleep Mode Current

The UC3573 is a Buck pulse width modulator which steps down and regulates a positive input voltage. The chip is optimized for use in a single inductor buck switching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak gate driver. The UC3573 includes an undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current limit. Input current can be sensed and limited to a user determined maximum value. In addition, a sleep comparator interfaces to the UVLO circuit which turns the chip off when the input voltage is below the UVLO threshold. This reduces the supply current to only 50uA, making the UC3573 ideal for battery powered applications.

The UC3573 is a Buck pulse width modulator which steps down and regulates a positive input voltage. The chip is optimized for use in a single inductor buck switching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak gate driver. The UC3573 includes an undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current limit. Input current can be sensed and limited to a user determined maximum value. In addition, a sleep comparator interfaces to the UVLO circuit which turns the chip off when the input voltage is below the UVLO threshold. This reduces the supply current to only 50uA, making the UC3573 ideal for battery powered applications.
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類型 標題 日期
* Data sheet Buck Pulse Width Modulator Stepdown Voltage Regulator datasheet (Rev. A) 2010年 7月 15日
Application note DN-70 UC3573 Buck Regulator PWM Control IC - Typical Application Circuit 1999年 9月 5日

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