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The DS90CF384A receiver converts the four LVDS data streams (Up to 1.8 Gbps throughput or 227 Megabytes/sec bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL). Also available is the DS90CF364A that converts the three LVDS data streams (Up to 1.3 Gbps throughput or 170 Megabytes/sec bandwidth) back into parallel 21 bits of CMOS/TTL data (18 bits of RGB and 3 bits of Hsync, Vsync and DE). Both Receivers' outputs are Falling edge strobe. A Rising edge or Falling edge strobe transmitter (DS90C383A/DS90C363A) will interoperate with a Falling edge strobe Receiver without any translation logic.
The DS90CF384A / DS90CF364A devices are enhanced over prior generation receivers and provided a wider data valid time on the receiver output.
This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.
| Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | DS90CF384A/364A 3.3V LVDS Rcvr 24Bit FPD Link 65MHz/18Bit FPD Link - 65 MHz datasheet (Rev. I) | 19 Apr 2013 | |
| Application note | High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs | 09 Nov 2018 | ||
| Application note | How to Map RGB Signals to LVDS/OpenLDI(OLDI) Displays (Rev. A) | 29 Jun 2018 | ||
| Application note | AN-1032 An Introduction to FPD-Link (Rev. C) | 08 Aug 2017 | ||
| Application note | Receiver Skew Margin for Channel Link I and FPD Link I Devices | 13 Jan 2016 | ||
| Application note | TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map | 15 Mai 2004 | ||
| Application note | AN-1056 STN Application Using FPD-Link | 14 Mai 2004 | ||
| Application note | AN-1085 FPD-Link PCB and Interconnect Design-In Guidelines | 14 Mai 2004 |
Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.
The FPD-Link evaluation kit includes a transmitter (Tx) board, a receiver (Rx) board and interfacing cables. This kit shows the chipsets interfacing from test equipment or a graphics controller using low-voltage differential signaling (LVDS) to a receiver board.
The transmitter board accepts (...)
| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| TSSOP (DGG) | 48 | Ultra Librarian |
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