The DS90URxxx-Q1 chipset translates a 24-bit parallel bus into a fully transparent data/control FPD-Link II LVDS serial stream with embedded clock information. This chipset is designed for driving graphical data to displays requiring 18-bit color depth: RGB666 + HS, VS, DE + three additional general-purpose data channels. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. The device saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.
The DS90URxxx-Q1 incorporates FPD-Link II LVDS signaling on the high-speed I/O. FPD-Link II LVDS provides a low-power and low-noise environment for reliably transferring data over a serial transmission path. By optimizing the Serializer output edge rate for the operating frequency range, EMI is further reduced.
In addition, the device features pre-emphasis to boost signals over longer distances using lossy cables. Internal DC-balanced encoding and decoding is used to support AC-coupled interconnects. Using TI’s proprietary random lock, the parallel data of the Serializer are randomized to the Deserializer without the need of REFCLK.
| Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | DS90URxxx-Q1 5MHz to 43MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset datasheet (Rev. P) | PDF | HTML | 29 Aug 2024 |
| Application note | DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E) | 29 Apr 2013 | ||
| Application note | LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A) | 29 Apr 2013 | ||
| Application note | AN-1807 FPD-Link II Display SerDes Overview (Rev. B) | 26 Apr 2013 | ||
| Application note | AN-2068 DS90UR241/124 Spread Spectrum Tolerance Support (Rev. B) | 26 Apr 2013 | ||
| Application note | Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A) | 26 Apr 2013 | ||
| User guide | High Efficiency Portable Media Player (PMP) Dock Station User Guide | 27 Jan 2012 | ||
| User guide | DS90UR241/DS90UR124 SERDES Evaluation Kit User's Guide | 26 Jan 2012 | ||
| User guide | FPD to SERDES (UR) Translator Chip DS99R421 Evaluation Kit User's Guide | 26 Jan 2012 |
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The SERDESUR-43 is an evaluation kit designed to demonstrate performance and capabilities of the DS90UR124 and DS90UR241 FPD-Link II Serializer/Deserializer Chipset.
The DS90UR241 Serializer board accepts LVCMOS input signals and provides single serialized FPD-LInk II LVDS data pair as an output. (...)
| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| TQFP (PAG) | 64 | Ultra Librarian |
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