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The LM25115 controller contains all of the features necessary to implement multiple output power converters utilizing the Secondary Side Post Regulation (SSPR) technique. The SSPR technique develops a highly efficient and well regulated auxiliary output from the secondary side switching waveform of an isolated power converter. Regulation of the auxiliary output voltage is achieved by leading edge pulse width modulation (PWM) of the main channel duty cycle. Leading edge modulation is compatible with either current mode or voltage mode control of the main output. The LM25115 drives external high side and low side NMOS power switches configured as a synchronous buck regulator. A current sense amplifier provides overload protection and operates over a wide common mode input range. Additional features include a low dropout (LDO) bias regulator, error amplifier, precision reference, adaptive dead time control of the gate signals and thermal shutdown.
| Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | LM25115 Secondary Side Post Regulator Controller datasheet (Rev. A) | 01 Apr 2013 | |
| White paper | Valuing wide VIN, low EMI synchronous buck circuits for cost-driven, demanding a (Rev. A) | 10 Apr 2019 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 25 Jun 2018 | ||
| Analog Design Journal | Reduce buck-converter EMI and voltage stress by minimizing inductive parasitics | 21 Jul 2016 | ||
| EVM User's guide | AN-1368 LM5115/5025A Evaluation Board (Rev. A) | 26 Apr 2013 | ||
| EVM User's guide | AN-1367 LM5115 HV DC Evaluation Board (Rev. B) | 24 Apr 2013 | ||
| EVM User's guide | AN-1542 LM5115A Evaluation Board (Rev. B) | 24 Apr 2013 | ||
| Application note | Minimizing FET Losses For a High Input Rail Buck Converter (Rev. A) | 23 Apr 2013 |
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| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| TSSOP (PW) | 16 | Ultra Librarian |
| WSON (NHQ) | 16 | Ultra Librarian |
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