The TPS3617 and TPS3618 are battery-backup supervisors that monitor 5 V supplies. They provide a battery-backup function ideal for applications that require data retention of CMOS RAM during fault conditions. When the voltage at VDD drops below a preset threshold (VIT), the active low push-pull RESET output asserts, and VOUT switches from VDD to VBAT. When VDD rises above the trip threshold, VOUT switches immediately from VBAT to VDD. The RESET output remains low until the delay time (td) expires. During power on, RESET is asserted when the supply voltage (VDD or VBAT) goes higher than 1.1 V.
The PFI and PFO pins are provided if additional voltage monitoring is needed. If the voltage at PFI is less than 1.15 V, the push-pull PFO pin will assert low. When the voltage at PFI exceeds the threshold voltage, PFO will go high.
These devices also feature a watchdog timer pin (WDI) that monitors processor activity and asserts RESET if the the processor is inactive longer than the watchdog timeout period. If the watchdog timer is not used, the WDI pin should be left floating.
The TPS3617 and TPS3618 are available in an 8-pin MSOP package and are characterized for operation over a temperature range of -40°C to +85°C.
| Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | Battery-Backup Supervisor for RAM Retention datasheet (Rev. D) | 10 Dez 2006 |
Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.
Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support.